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Receive buffer architecture method and apparatus

  • US 10,397,144 B2
  • Filed: 12/22/2016
  • Issued: 08/27/2019
  • Est. Priority Date: 12/22/2016
  • Status: Active Grant
First Claim
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1. An apparatus comprising:

  • a communication chip comprising a receive buffer that stores a first data packet associated with a first context, among a plurality of contexts, and a second data packet associated with a second context, among the plurality of contexts, wherein the first and second contexts identify respective first and second processes to be performed by a compute node in association with the respective first and second data packets, and the first and second data packets are stored in the receive buffer to be delivered to the compute node for operation of the first and second processes,wherein the receive buffer includes logic that is to determine that the compute node is unavailable to perform the first process with respect to the first data packet, determine that the compute node is available to perform the second process with respect to the second data packet, and read the second data packet for delivery to the compute node while the first data packet is retained.

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