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Fan-out semiconductor package

  • US 10,402,620 B2
  • Filed: 05/16/2018
  • Issued: 09/03/2019
  • Est. Priority Date: 10/27/2017
  • Status: Active Grant
First Claim
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1. A fan-out semiconductor package comprising:

  • a core member including a support layer and a first wiring layer disposed on an upper surface of the support layer, and having a through-hole penetrating through the support layer;

    a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface;

    an encapsulant covering the core member and the inactive surface of the semiconductor chip and filling at least portions of the through-hole;

    a connection member including an insulating layer disposed on the first wiring layer of the core member and the active surface of the semiconductor chip, a redistribution layer disposed on the insulating layer, first vias electrically connecting the redistribution layer and the connection pads to each other, and second vias electrically connecting the redistribution layer and the first wiring layer to each other; and

    a passivation layer disposed on the insulating layer and covering the redistribution layer,wherein (t2×

    40%)<

    t1<

    (t2×

    45%) which t1 is the thickness of the passivation layer and t2 is the distance from the inactive surface to the lower surface of the encapsulant.

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