System for optimizing graphics operations

• US 10,402,934 B2
• Filed: 06/21/2017
• Issued: 09/03/2019
• Est. Priority Date: 04/16/2004
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Harper, John, Brunner, Ralph, Graffagnino, Peter, Zimmer, Mark
• Primary Examiner(s): Ma, Tize
• Application Number:
  US15/629,272
• Publication Number:
  US 20170345123A1
• Time in Patent Office: 804 Days
• Field of Search: None
• CPC Class Codes: G06F 15/76 Architectures of general purpose stored program computers with program plugboard G06F15/08; multicomputers G06F15/16
• CPC Class Codes: G06F 15/80 comprising an array of processing units with common control, e.g. single instruction multiple data processors G06F15/82 takes precedence ; for correlation function computation G06F17/15
• CPC Class Codes: G06T 1/20 Processor architectures; Processor configuration, e.g. pipelining
• CPC Class Codes: G09G 5/02 characterised by the way in which colour is displayed details of colour display specific for CRTs G09G1/28; specific for flat matrix panels other than liquid crystal displays G09G3/2003; specific for liquid crystal displays G09G3/3607

Abstract

Disclosed is a system for producing images including techniques for reducing the memory and processing power required for such operations. The system provides techniques for programmatically representing a graphics problem. The system further provides techniques for reducing and optimizing graphics problems for rendering with consideration of the system resources, such as the availability of a compatible GPU.

Claims

1. A method comprising:

receiving instructions including a request to render an image based upon the instructions;

performing an optimization after receiving the request to render but prior to rendering, wherein the optimization comprises;

compiling at least a portion of the instructions, where a compiling result is based at least in part upon properties of available rendering hardware;

designating a first portion of the image for rendering on a first graphics processor; and

designating a second portion of the image for rendering on a second graphics processor,

wherein the designations of the first and second portions for rendering on the first and second graphics processors, respectively, are based, at least in part, upon;

determining the relative efficiencies of the first and second graphics processors in rendering the content of the first portion of the image, and

determining the relative efficiencies of the first and second graphics processors in rendering the content of the second portion of the image, wherein the first portion is different from the second portion, and wherein the first graphics processor is different from the second graphics processor;

rendering the first portion of the image on the first graphics processor; and

rendering the second portion of the image on the second graphics processor.

2. The method of claim 1, wherein one of the graphics processors is a CPU emulating a GPU.

3. The method of claim 1, wherein at least one of the graphics processors is a GPU.

4. The method of claim 1, wherein the compiling result is also based upon the requirements of the instructions and the status of the available rendering hardware.

5. The method of claim 1, wherein the compiling is performed just in time for rendering.

6. The method of claim 1, wherein rendering the first portion of the image on the first graphics processor comprises rendering a first effect, wherein rendering the second portion of the image on the second graphics processor comprises rendering a second effect, and wherein the first effect is different from the second effect.

7. The method of claim 1, wherein the first designated portion comprises a first polygon and the second designated portion comprises a second polygon.

8. The method of claim 1, wherein the first designated portion comprises a first scan line and the second designated portion comprises a second scan line.

9. A non-transitory computer-readable medium comprising instructions that, when executed, cause one or more processors to:

receive instructions including a request to render an image based upon the instructions;

perform an optimization after receiving the request to render but prior to rendering, wherein the optimization comprises;

compiling at least a portion of the instructions, where a compiling result is based at least in part upon properties of available rendering hardware;

designating a first portion of the image for rendering on a first graphics processor; and

designating a second portion of the image for rendering on a second graphics processor,

wherein the designations of the first and second portions for rendering on the first and second graphics processors, respectively, are based, at least in part, upon;

determining the relative efficiencies of the first and second graphics processors in rendering the content of the first portion of the image, and

determining the relative efficiencies of the first and second graphics processors in rendering the content of the second portion of the image,

wherein the first portion is different from the second portion, and

wherein the first graphics processor is different from the second graphics processor;

render the first portion of the image on the first graphics processor; and

render the second portion of the image on the second graphics processor.

10. The non-transitory computer-readable medium of claim 9, wherein one of the graphics processors is a CPU emulating a GPU.

11. The non-transitory computer-readable medium of claim 9, wherein at least one of the graphics processors is a GPU.

12. The non-transitory computer-readable medium of claim 9, wherein the compiling result is also based upon the requirements of the instructions and the status of the hardware.

13. The non-transitory computer-readable medium of claim 9, wherein the compiling is performed just in time for rendering.

14. The non-transitory computer-readable medium of claim 9, wherein rendering the first portion of the image on the first graphics processor comprises rendering a first effect, wherein rendering the second portion of the image on the second graphics processor comprises rendering a second effect, and wherein the first effect is different from the second effect.

15. The non-transitory computer-readable medium of claim 9, wherein the first designated portion comprises a first polygon and the second designated portion comprises a second polygon.

16. The non-transitory computer-readable medium of claim 9, wherein the first designated portion comprises a first scan line and the second designated portion comprises a second scan line.

17. A system comprising:

one or more processors; and

memory comprising instructions that, when executed, cause the one or more processors to;

receive instructions including a request to render an image based upon the instructions;

perform an optimization after receiving the request to render but prior to rendering, wherein the optimization comprises;

compiling at least a portion of the instructions, where a compiling result is based at least in part upon properties of available rendering hardware;

designating a first portion of the image for rendering on a first graphics processor; and

designating a second portion of the image for rendering on a second graphics processor,

wherein the designations of the first and second portions for rendering on the first and second graphics processors, respectively, are based, at least in part, upon;

determining the relative efficiencies of the first and second graphics processors in rendering the content of the first portion of the image, and

determining the relative efficiencies of the first and second graphics processors in rendering the content of the second portion of the image,

wherein the first portion is different from the second portion, and

wherein the first graphics processor is different from the second graphics processor;

cause rendering of the first portion of the image on the first graphics processor; and

cause rendering of the second portion of the image on the second graphics processor.

18. The system of claim 17, wherein one of the graphic processors is a CPU emulating a GPU.

19. The system of claim 17, wherein at least one of the graphics processors is a GPU.

20. The system of claim 17, wherein the compiling result is also based upon the requirements of the instructions and the status of the available rendering hardware.

21. The system of claim 17, wherein the first designated portion comprises a first polygon and the second designated portion comprises a second polygon.

22. The system of claim 17, wherein the compiling is performed just in time for rendering.