Display panel and display device

• US 10,403,194 B2
• Filed: 10/18/2017
• Issued: 09/03/2019
• Est. Priority Date: 05/27/2017
• Status: Active Grant

• Current Assignee: Wuhan Tianma Micro-Electronics Company Limited (Wuhan Donghu New Technology Development Zone Production Promotion Centre), Wuhan Tianma Microelectronics Company Limited Shanghai Branch
• Original Assignee: Shanghai Tianma AM-OLED Co. Ltd (Tianma Microelectronics Company Limited)
• Inventors: Li, Chunyang, Xiang, Dongxu, Li, Yue
• Primary Examiner(s): Eurice, Michael J
• Application Number:
  US15/787,379
• Publication Number:
  US 20180342194A1
• Time in Patent Office: 685 Days
• CPC Class Codes: G02F 1/133305 Flexible substrates, e.g. plastics, organic film
• CPC Class Codes: G02F 1/134309 characterised by their geometrical arrangement
• CPC Class Codes: G02F 1/13452 Conductors connecting driver circuitry and terminals of panels
• CPC Class Codes: G02F 1/13454 Drivers integrated on the active matrix substrate G02F1/136277 takes precedence
• CPC Class Codes: G09G 2300/0413 Details of dummy pixels or dummy lines in flat panels
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2300/0876 Supplementary capacities in pixels having special driving circuits and electrodes instead of being connected to common electrode or ground; Use of additional capacitively coupled compensation electrodes
• CPC Class Codes: G09G 2310/0213 controlling the sequence of the scanning lines with respect to the patterns to be displayed, e.g. to save power
• CPC Class Codes: G09G 2320/0223 Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
• CPC Class Codes: G09G 2320/0233 Improving the luminance or brightness uniformity across the screen
• CPC Class Codes: G09G 3/2092 Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto suitable for both CRT and flat panel G09G5/003; specific for a CRT G09G1/165
• CPC Class Codes: G09G 3/3266 Details of drivers for scan electrodes
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: G09G 3/3674 Details of drivers for scan electrodes
• CPC Class Codes: G09G 3/3677 suitable for active matrices only
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H10K 59/12 Active-matrix OLED [AMOLED] displays
• CPC Class Codes: H10K 59/131 Interconnections, e.g. wiring lines or terminals

Abstract

A display panel includes a display area, the display area including a plurality of scan lines; and a non-display area, the non-display area including a plurality of gate driving circuits and at least one load compensating unit; wherein at least two of the plurality of scan lines have different lengths; each gate driving circuit is respectively connected with one scan line; each load compensating unit corresponds to one gate driving circuit to compensate a load of one gate driving circuit, and the larger a length of the scan line connected with the gate driving circuit, the smaller a load added by a corresponding load compensating unit. In the display panel provided by the present disclosure, through arranging the load compensating unit, the phenomenon of the non-uniform brightness of the display panel can be improved, and display quality of the display panel can be improved.

Claims

1. A display panel, comprising:

a display area, the display area comprising a plurality of scan lines each connected with at least one pixel unit; and

a non-display area, the non-display area comprising a plurality of gate driving circuits and at least one load compensating unit;

wherein at least two of the plurality of scan lines have different lengths, and the at least two scan lines having different lengths are connected with different numbers of pixel units;

each of the plurality of gate driving circuits is respectively connected with one of the plurality of scan lines;

each of the at least one load compensating unit corresponds to one of the plurality of gate driving circuits to compensate a load of the one of the plurality of gate driving circuits, and the larger a length of the scan line connected with the gate driving circuit is, the greater the number of pixel units connected with the scan line is, and the smaller a load added by a corresponding load compensating unit is;

wherein the at least one load compensating unit comprises a capacitor.

2. The display panel according to claim 1, wherein the non-display area further comprises a drive signal line area and a gate driving circuit area where the plurality of gate driving circuits is located, the drive signal line area is located at a side of the gate driving circuit area away from the display area,

at least one load compensating unit is arranged in a portion of the drive signal line area away from the gate driving circuit area;

or,

at least one load compensating unit is arranged in a portion of the drive signal line area close to the gate driving circuit area;

or,

at least one load compensating unit is arranged in a portion of the gate driving circuit area away from the drive signal line area.

3. The display panel according to claim 1, wherein a shape of the display area is circular, oval or polygonal.

4. The display panel according to claim 1, wherein the display panel is a liquid crystal display panel or an organic light-emitting diode (OLED) display panel.

5. The display panel according to claim 1, wherein the capacitor comprises a first metal coupling layer, a dielectric layer and a second metal coupling layer;

the first metal coupling layer, the dielectric layer and the second metal coupling layer are successively arranged by stacking.

6. The display panel according to claim 5, further comprising:

a thin film transistor, the thin film transistor comprising a gate electrode,

wherein the first metal coupling layer and the gate electrode are arranged in a same layer.

7. The display panel according to claim 1, wherein the scan lines are arranged parallel to each other, one of the plurality of scan lines is a first scan line, the other scan lines are second scan lines,

the first scan line is arranged at a middle position of the display area, the second scan lines are symmetrically arranged at two sides of the first scan line;

a load corresponding to a length of the first scan line is taken as a reference load, the load compensating units and the second scan lines are arranged in one-to-one correspondence, so that loads in other gate driving circuits connected with the second scan lines in one-to-one correspondence are compensated accordingly.

8. The display panel according to the claim 7, wherein the display area is a circular region, any two adjacent second scan lines and an outer edge of the display area surround to form a zigzag region, and at least one load compensating unit is arranged in the zigzag region.

9. The display panel according to claim 1, wherein the load compensating unit and the scan line are arranged in different layers.

10. The display panel according to claim 9, wherein the load compensating unit is connected with the gate driving circuit through bridging or through a through hole.

11. The display panel according to claim 1, wherein the at least one load compensating unit comprises a virtual pixel unit.

12. The display panel according to claim 11, wherein the at least one load compensating unit comprises a resistor.

13. The display panel according to claim 12, wherein the resistor comprises a plurality of wires for respectively compensating loads in the plurality of gate driving circuits, each wire comprises at least one bending section, the number of the bending sections of at least two of the plurality of wires are not identical.

14. The display panel according to claim 12, wherein the resistor comprises a plurality of wires for respectively compensating loads in the plurality of gate driving circuits, cross sections of at least two wires are not identical.

15. A display device, comprising a display panel, wherein the display panel comprises:

a display area, the display area comprising a plurality of scan lines each connected with at least one pixel unit; and

a non-display area, the non-display area comprising a plurality of gate driving circuits and at least one load compensating unit;

wherein at least two of the plurality of scan lines have different lengths, and the at least two scan lines having different lengths are connected with different numbers of pixel units;

each of the plurality of gate driving circuit is respectively connected with one of the plurality of scan lines;

each of the at least one load compensating unit corresponds to one of the plurality of gate driving circuits to compensate a load of the one of the plurality of gate driving circuits, and the larger a length of the scan line connected with the gate driving circuit, the greater the number of pixel units connected with the scan line, and the smaller a load added by a corresponding load compensating unit;

wherein the at least one load compensating unit comprises a capacitor.