Methods of operating memory

• US 10,403,371 B2
• Filed: 06/15/2018
• Issued: 09/03/2019
• Est. Priority Date: 02/23/2012
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Vali, Tommaso, Eldredge, Kenneth J., Roohparvar, Frankie F., De Santis, Luca
• Primary Examiner(s): Tran, Michael T
• Application Number:
  US16/009,541
• Publication Number:
  US 20180294035A1
• Time in Patent Office: 445 Days
• Field of Search: 36518517, 36518524
• CPC Class Codes: G06N 3/04 Architecture, e.g. interconnection topology
• CPC Class Codes: G06N 3/045 Combinations of networks
• CPC Class Codes: G06N 3/063 using electronic means
• CPC Class Codes: G11C 16/0483 comprising cells having several storage transistors connected in series
• CPC Class Codes: G11C 16/08 Address circuits; Decoders; Word-line control circuits
• CPC Class Codes: G11C 16/26 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 7/1006 Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
• CPC Class Codes: G11C 7/106 Data output latches

Abstract

Methods of operating memory include generating a data value indicative of a level of a property sensed from a data line while applying potentials to control gates of memory cells of more than one string of series-connected memory cells connected to that data line. Methods of operating memory further include generating data values indicative of levels of a property sensed from data lines while applying potentials to control gates of memory cells of strings of series-connected memory cells connected to those data lines, performing a logical operation on a set of data values comprising those data values, and determining a potential to be applied to control gates of different memory cells of those strings of series-connected memory cells in response to an output of the logical operation on the set of data values.

Claims

1. A method of operating a memory, comprising:

applying a first potential to a control gate of a memory cell of a first string of series-connected memory cells connected to a particular data line;

applying a second potential to a control gate of a memory cell of a second string of series-connected memory cells connected to the particular data line while applying the first potential to the control gate of the memory cell of the first string of series-connected memory cells; and

generating a data value indicative of a level of a property sensed from the particular data line while applying the first potential to the control gate of the memory cell of the first string of series-connected memory cells and while applying the second potential to the control gate of the memory cell of the second string of series-connected memory cells, wherein the property is selected from a group consisting of a voltage and a current.

2. The method of claim 1, wherein generating a data value comprises generating a data value comprising one or more digits of information.

3. The method of claim 1, further comprising:

applying a third potential to a control gate of a memory cell of a third string of series-connected memory cells connected to the particular data line while applying the first potential to the control gate of the memory cell of the first string of series-connected memory cells and while applying the second potential to the control gate of the memory cell of the first string of series-connected memory cells; and

wherein generating the data value indicative of the level of the property sensed from the particular data line, comprise generating the data value while applying the first potential to the control gate of the memory cell of the first string of series-connected memory cells, while applying the second potential to the control gate of the memory cell of the second string of series-connected memory cells and while applying the third potential to the control gate of the memory cell of the third string of series-connected memory cells.

4. A method of operating a memory, comprising:

for each string of series-connected memory cells of a first plurality of strings of series-connected memory cells connected to a first data line, applying a respective potential of a first plurality of potentials to a respective control gate of a memory cell of that string of series-connected memory cells of the first plurality of strings of series-connected memory cells, and generating a first data value indicative of a level of a property sensed from the first data line while applying the respective potentials of the first plurality of potentials to the respective control gates of the memory cells of each string of series-connected memory cells of the first plurality of strings of series-connected memory cells; and

for each string of series-connected memory cells of a second plurality of strings of series-connected memory cells connected to a second data line, applying a respective potential of a second plurality of potentials to a respective control gate of a memory cell of that string of series-connected memory cells of the second plurality of strings of series-connected memory cells, and generating a second data value indicative of a level of a property sensed from the second data line while applying the respective potentials of the second plurality of potentials to the respective control gates of the memory cells of each string of series-connected memory cells of the second plurality of strings of series-connected memory cells.

5. The method of claim 4, wherein generating the first data value indicative of the level of the property sensed from the first data line, and generating the second data value indicative of the level of the property sensed from the second data line, comprises a property is selected from a group consisting of a voltage and a current.

6. The method of claim 4, further comprising, performing a logical operation on a set of data values comprising the first data value and the second data value.

7. The method of claim 6, further comprising:

determining a potential to be applied to a control gate of a different memory cell of one of the strings of series-connected memory cells of the first plurality of strings of series-connected memory cells, and determining a potential to be applied to a control gate of a different memory cell of one of the strings of series-connected memory cells of the second plurality of strings of series-connected memory cells, in response to an output of the logical operation on the set of data values.

8. The method of claim 6, further comprising:

determining a potential to be applied to a control gate of a different memory cell of each of the strings of series-connected memory cells of the first plurality of strings of series-connected memory cells, and determining a potential to be applied to a control gate of a different memory cell of each of the strings of series-connected memory cells of the second plurality of strings of series-connected memory cells, in response to an output of the logical operation on the set of data values.

9. The method of claim 4, further comprising:

for each string of series-connected memory cells of a third plurality of strings of series-connected memory cells connected to a third data line, applying a respective potential of a third plurality of potentials to a respective control gate of a memory cell of that string of series-connected memory cells of the third plurality of strings of series-connected memory cells, and generating a third data value indicative of a level of a property sensed from the third data line while applying the respective potentials of the third plurality of potentials to the respective control gates of the memory cells of each string of series-connected memory cells of the third plurality of strings of series-connected memory cells.

10. The method of claim 9, further comprising performing a logical operation on a set of data values comprising the first data value, the second data value and the third data value.

11. The method of claim 10, further comprising:

for each string of series-connected memory cells of the first plurality of strings of series-connected memory cells, determining a respective potential of a fourth plurality of potentials to be applied to a respective control gate of a different memory cell of that string of series-connected memory cells of the first plurality of strings of series-connected memory cells in response to an output of the logical operation on the set of data values.

12. The method of claim 11, further comprising:

generating a fourth data value indicative of a level of the property sensed from the first data line while applying the respective potentials of the fourth plurality of potentials to the respective control gates of the different memory cells of each string of series-connected memory cells of the first plurality of strings of series-connected memory cells.

13. The method of claim 10, wherein performing the logical operation on the set of data values comprises performing the logical operation on a set of data values each comprising more than one digit of information.

14. A method of operating a memory, comprising:

for each string of series-connected memory cells of a first plurality of strings of series-connected memory cells connected to a first data line, applying a respective potential of a first plurality of potentials to a respective control gate of a memory cell of that string of series-connected memory cells of the first plurality of strings of series-connected memory cells, and generating a first data value indicative of a level of a property sensed from the first data line while applying the respective potentials of the first plurality of potentials to the respective control gates of the memory cells of each string of series-connected memory cells of the first plurality of strings of series-connected memory cells;

for each string of series-connected memory cells of a second plurality of strings of series-connected memory cells connected to a second data line, applying a respective potential of a second plurality of potentials to a respective control gate of a memory cell of that string of series-connected memory cells of the second plurality of strings of series-connected memory cells, and generating a second data value indicative of a level of a property sensed from the second data line while applying the respective potentials of the second plurality of potentials to the respective control gates of the memory cells of each string of series-connected memory cells of the second plurality of strings of series-connected memory cells;

performing a logical operation on a set of data values comprising the first data value and the second data value;

for each string of series-connected memory cells of the first plurality of strings of series-connected memory cells, determining a respective potential of a third plurality of potentials to be applied to a respective control gate of a different memory cell of that string of series-connected memory cells of the first plurality of strings of series-connected memory cells in response to an output of the logical operation on the set of data values; and

for each string of series-connected memory cells of the second plurality of strings of series-connected memory cells, determining a respective potential of a fourth plurality of potentials to be applied to a respective control gate of a different memory cell of that string of series-connected memory cells of the second plurality of strings of series-connected memory cells in response to the output of the logical operation on the set of data values.

15. The method of claim 14, further comprising:

generating a third data value indicative of a level of the property sensed from the first data line while applying the respective potentials of the third plurality of potentials to the respective control gates of the different memory cells of each string of series-connected memory cells of the first plurality of strings of series-connected memory cells; and

generating a fourth data value indicative of a level of the property sensed from the second data line while applying the respective potentials of the fourth plurality of potentials to the respective control gates of the different memory cells of each string of series-connected memory cells of the second plurality of strings of series-connected memory cells.

16. The method of claim 15, wherein performing the logical operation on the set of data values comprises performing the logical operation on a set of data values comprising the first data value, the second data value and the third data value.

17. The method of claim 14, wherein performing the logical operation comprises performing a particular operation selected from a group consisting of addition, subtraction, multiplication, and division.

18. The method of claim 17, wherein performing the logical operation further comprises comparing an output of the particular operation to a threshold value.

19. The method of claim 17, wherein performing the logical operation further comprises comparing an output of the particular operation to a range of input data values having a corresponding range of output data values.

20. The method of claim 19, wherein comparing the output of the particular operation to the range of input data values having the corresponding range of output data values facilitates performing a particular function selected from a group consisting of a linear function and a non-linear function.