Multilayer pillar for reduced stress interconnect and method of making same
First Claim
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1. A method comprising:
- forming a barrier and adhesion layer that connects a modulated copper pillar to a chip;
forming a seed layer contacting the barrier and adhesion layer;
forming a first copper layer contacting the seed layer;
forming a second copper layer contacting a solder material;
forming at least one deformation region, wherein the at least one-deformation region is between the first copper layer and the second copper layer and has a modulus of elasticity less than copper;
forming a first protective layer interposed at an interface between a surface of the at least one deformation region and the first copper layer; and
forming a second protective layer interposed at an interface between a surface of the second copper layer and the at least one deformation region and the second copper layer, wherein;
the first protective layer is a layer of nickel covering the entire surface of the at least one deformation region; and
the second protective layer is another layer of nickel covering the entire surface of the at least one deformation region.
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Abstract
A multi-layer pillar and method of fabricating the same is provided. The multi-layer pillar is used as an interconnect between a chip and substrate. The pillar has at least one low strength, high ductility deformation region configured to absorb force imposed during chip assembly and thermal excursions.
54 Citations
9 Claims
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1. A method comprising:
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forming a barrier and adhesion layer that connects a modulated copper pillar to a chip; forming a seed layer contacting the barrier and adhesion layer; forming a first copper layer contacting the seed layer; forming a second copper layer contacting a solder material; forming at least one deformation region, wherein the at least one-deformation region is between the first copper layer and the second copper layer and has a modulus of elasticity less than copper; forming a first protective layer interposed at an interface between a surface of the at least one deformation region and the first copper layer; and forming a second protective layer interposed at an interface between a surface of the second copper layer and the at least one deformation region and the second copper layer, wherein; the first protective layer is a layer of nickel covering the entire surface of the at least one deformation region; and the second protective layer is another layer of nickel covering the entire surface of the at least one deformation region. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method comprising:
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forming a barrier and adhesion layer that connects a modulated copper pillar to a chip; forming a seed layer contacting the barrier layer and adhesion layer; forming a first copper layer contacting the seed layer; forming a second copper layer contacting a solder material; forming at least one deformation region, wherein the at least one deformation region is between the first copper layer and the second copper layer and has a modulus of elasticity less than copper; forming a first nickel layer between and contacting the first copper layer and the at least one deformation region; and forming a second nickel layer between and contacting the second copper layer and the at least one deformation region.
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Specification