Switched capacitor voltage converters with current sense circuits coupled to tank circuits
First Claim
1. A switched capacitor voltage converter comprising:
- an input port;
an output port;
a first control field-effect transistor (FET) comprising a first terminal coupled to the input port, a second terminal, and a gate;
a second control FET comprising a first terminal coupled to the second terminal of the first control FET, a second terminal, and a gate;
a first tank circuit coupled to the second terminal of the first control FET and to the first terminal of the second control FET;
a first high-side sync FET comprising a first terminal coupled to the output port, a second terminal coupled to the first tank circuit, and a gate;
a first low-side sync FET comprising a first terminal coupled to the second terminal of the first high-side sync FET and to the first tank circuit, a second terminal, and a gate;
a first current sense circuit coupled to the first tank circuit, the first current sense circuit configured to determine a direction of current flow in the first tank circuit; and
a controller configured to;
provide the first gating signal to turn on the first control FET and the first high-side sync FET in response to a turn-on edge of a first pulse width modulation (PWM) signal, and to turn off the first control FET and the first high-side sync FET in response to a turn-off edge of the first PWM signal or the first current sense circuit detecting a change in direction of the current flow in the first tank circuit; and
provide the second gating signal to turn on the second control FET and the first low-side sync FET in response to a turn-on edge of a second PWM signal, and to turn off the second control FET and the first low-side sync FET in response to a turn-off edge of the second PWM signal or the first current sense circuit detecting a change in direction of the current flow in the first tank circuit.
1 Assignment
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Accused Products
Abstract
A switched capacitor voltage converter comprises: an input port; an output port; a first control field-effect transistor (FET) comprising a first terminal coupled to the input port; a second control FET comprising a first terminal coupled to a second terminal of the first control FET; a first tank circuit coupled to the second terminal of the first control FET and to the first terminal of the second control FET; a first high-side sync FET comprising a first terminal coupled to the output port, a second terminal coupled to the first tank circuit; a first low-side sync FET comprising a first terminal coupled to the second terminal of the first high-side sync FET and to the first tank circuit; and a first current sense circuit coupled to the first tank circuit.
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Citations
13 Claims
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1. A switched capacitor voltage converter comprising:
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an input port; an output port; a first control field-effect transistor (FET) comprising a first terminal coupled to the input port, a second terminal, and a gate; a second control FET comprising a first terminal coupled to the second terminal of the first control FET, a second terminal, and a gate; a first tank circuit coupled to the second terminal of the first control FET and to the first terminal of the second control FET; a first high-side sync FET comprising a first terminal coupled to the output port, a second terminal coupled to the first tank circuit, and a gate; a first low-side sync FET comprising a first terminal coupled to the second terminal of the first high-side sync FET and to the first tank circuit, a second terminal, and a gate; a first current sense circuit coupled to the first tank circuit, the first current sense circuit configured to determine a direction of current flow in the first tank circuit; and a controller configured to; provide the first gating signal to turn on the first control FET and the first high-side sync FET in response to a turn-on edge of a first pulse width modulation (PWM) signal, and to turn off the first control FET and the first high-side sync FET in response to a turn-off edge of the first PWM signal or the first current sense circuit detecting a change in direction of the current flow in the first tank circuit; and provide the second gating signal to turn on the second control FET and the first low-side sync FET in response to a turn-on edge of a second PWM signal, and to turn off the second control FET and the first low-side sync FET in response to a turn-off edge of the second PWM signal or the first current sense circuit detecting a change in direction of the current flow in the first tank circuit. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A switched capacitor voltage converter comprising:
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an input port; an output port; a set of serially-connected control field-effect transistors (FETs), a first field-effect transistor (FET) in the set of serially-connected control FETs coupled to the input port; a set of tank circuits coupled to the serially-connected control FETs; a set of rectifier half-bridge circuits coupled to the set of tank circuits, each rectifier half-bridge circuit coupled to the output port; a set of current sense circuits coupled to the set of tank circuits and configured to determine changes in current direction in each tank circuit; and a controller configured to control a switching frequency for the set of serially-connected control FETs and the set of rectifier half-bridge circuits, the controller configured to decrease the switching frequency if a current sense circuit in the set of current sense circuits indicates that a change in current direction occurs after a one-half duty cycle, provided the switched capacitor voltage converter is not in a soft start state. - View Dependent Claims (12, 13)
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Specification