Resource sharing in a telecommunications environment

• US 10,409,510 B2
• Filed: 01/18/2018
• Issued: 09/10/2019
• Est. Priority Date: 10/12/2004
• Status: Active Grant

• Current Assignee: TQ Delta LLC (Techquity Capital Management, LLC)
• Original Assignee: TQ Delta LLC (Techquity Capital Management, LLC)
• Inventors: Tzannes, Marcos C., Lund, Michael
• Primary Examiner(s): Tabone, Jr., John J
• Application Number:
  US15/874,277
• Publication Number:
  US 20180157436A1
• Time in Patent Office: 600 Days
• Field of Search: 714704, 714748, 714776, 714774, 714784, 714147, 714153, 714157, 714173, 375222, 379 9301, 709215
• CPC Class Codes: G06F 13/1647 with interleaved bank access
• CPC Class Codes: G06F 3/0611 in relation to response time
• CPC Class Codes: G06F 3/0631 by allocating resources to storage systems
• CPC Class Codes: G06F 3/0644 Management of space entities, e.g. partitions, extents, pools
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/0665 at area level, e.g. provisioning of virtual or logical volumes
• CPC Class Codes: G06F 3/0673 Single storage device
• CPC Class Codes: H04B 1/38 Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
• CPC Class Codes: H04L 1/0041 Arrangements at the transmitter end
• CPC Class Codes: H04L 1/0045 Arrangements at the receiver end
• CPC Class Codes: H04L 1/0057 Block codes H04L1/0061, H04L1/0064 take precedence
• CPC Class Codes: H04L 1/0071 Use of interleaving interleaving per se H03M13/27
• CPC Class Codes: H04L 1/1809 Selective-repeat protocols
• CPC Class Codes: H04L 1/1835 Buffer management
• CPC Class Codes: H04L 1/1874 Buffer management
• CPC Class Codes: H04L 12/5601 Transfer mode dependent, e.g. ATM
• CPC Class Codes: H04L 27/2601 Multicarrier modulation systems
• CPC Class Codes: H04L 45/00 Routing or path finding of packets in data switching networks routing or path finding in wireless networks H04W40/00
• CPC Class Codes: H04L 45/72 Routing based on the source address
• CPC Class Codes: H04L 47/10 Flow control; Congestion control
• CPC Class Codes: H04L 49/90 : Buffering arrangements
• CPC Class Codes: H04L 49/901 : using storage descriptor, e.g. read or write pointers

Abstract

A transceiver is designed to share memory and processing power amongst a plurality of transmitter and/or receiver latency paths, in a communications transceiver that carries or supports multiple applications. For example, the transmitter and/or receiver latency paths of the transceiver can share an interleaver/deinterleaver memory. This allocation can be done based on the data rate, latency, BER, impulse noise protection requirements of the application, data or information being transported over each latency path, or in general any parameter associated with the communications system.

Claims

1. A method that allows sharing of hardware resources in a transceiver comprising:

allocating a first portion of shared memory to an interleaver in a first latency path;

allocating a second portion of the shared memory to a deinterleaver in a second latency path,

transmitting to another transceiver information that is used to determine a maximum amount of shared memory that can be allocated to the interleaver or the deinterlever; and

updating the shared memory allocation between the interleaver and deinterleaver based on changing communication conditions, wherein the changing communications conditions include a change in communications channel conditions.

2. The method of claim 1, further comprising transmitting to another transceiver information that that is used to determine an updated maximum amount of shared memory that can be allocated to the interleaver or the deinterleaver.

3. The method of claim 2, wherein the information is transmitted during initialization.

4. The method of claim 2, wherein the information is transmitted during SHOWTIME.

5. A system for shared memory allocation comprising;

means for allocating a first portion of shared memory to an interleaver;

means for allocating a second portion of the shared memory to a deinterleaver;

means for transmitting to another transceiver information that is used to determine a maximum amount of shared memory that can be allocated to the interleaver or the deinterlever; and

means for updating the shared memory allocation between the interleaver and deinterleaver based on changing communication conditions, wherein the changing communications conditions include a change in channel conditions.

6. The system of claim 5, further comprising means for transmitting to another transceiver information that that is used to determine an updated maximum amount of shared memory that can be allocated to the interleaver or the deinterleaver.

7. The system of claim 6, wherein the information is transmitted during initialization.

8. The system of claim 6, wherein the information is transmitted during SHOWTIME.

9. A device comprising:

first portion of shared memory allocated to an interleaver;

a second portion of the shared memory allocated to a deinterleaver;

a transceiver operable to transmit to another transceiver information that is used to determine a maximum amount of shared memory that can be allocated to the interleaver or the deinterlever; and

an allocation module operable to update the shared memory allocation between the interleaver and deinterleaver based on changing communication conditions, wherein the changing communications conditions include a change in channel conditions.

10. The device of claim 9, wherein the transceiver is further operable to transmit to another transceiver information that that is used to determine an updated maximum amount of shared memory that can be allocated to the interleaver or the deinterleaver.

11. The device of claim 10, wherein the information is transmitted during initialization.

12. The device of claim 10, wherein the information is transmitted during SHOWTIME.

13. A method that allows sharing of hardware resources in a transceiver comprising:

allocating a first portion of shared memory to an interleaver in a transmit latency path;

allocating a second portion of the shared memory to a deinterleaver in a receive latency path;

transmitting to another transceiver information that indicates the shared memory allocation between the interleaver and the deinterlever; and

updating the shared memory allocation between the interleaver and deinterleaver based on changing communication conditions, wherein the changing communications conditions include a change in communications channel conditions.

14. The method of claim 13, further comprising transmitting to another transceiver information that indicates the updated shared memory allocation between the interleaver and the deinterlever.

15. The method of claim 14, wherein the information is transmitted during initialization.

16. The method of claim 14, wherein the information is transmitted during SHOWTIME.

17. A system for shared memory allocation comprising:

means for allocating a first portion of shared memory to an interleaver in a transmit latency path;

means for allocating a second portion of the shared memory to a deinterleaver in a receive latency path;

means for transmitting to another transceiver information that indicates the shared memory allocation between the interleaver and the deinterlever; and

means for updating the shared memory allocation between the interleaver and deinterleaver based on changing communication conditions, wherein the changing communications conditions include a change in channel conditions.

18. The system of claim 17, further comprising means for transmitting to another transceiver information that indicates the updated shared memory allocation between the interleaver and the deinterlever.

19. The system of claim 18, wherein the information is transmitted during initialization.

20. The system of claim 18, wherein the information is transmitted during SHOWTIME.

21. A device comprising:

a transceiver operable to allocate a first portion of shared memory to an interleaver in a transmit latency path and operable allocate a second portion of the shared memory to a deinterleaver in a receiver latency path;

the transceiver further operable to transmit to another transceiver information that indicates the shared memory allocation between the interleaver and the deinterlever; and

and operable to update the shared memory allocation between the interleaver and deinterleaver based on changing communication conditions, wherein the changing communications conditions include a change in channel conditions.

22. The device of claim 21, wherein the transceiver is further operable to transmit to another transceiver information that indicates the updated shared memory allocation between the interleaver and the deinterlever.

23. The device of claim 22, wherein the information is transmitted during initialization.

24. The device of claim 22, wherein the information is transmitted during SHOWTIME.