Efficient analog layout prototyping by layout reuse with routing preservation

• US 10,409,943 B2
• Filed: 09/02/2014
• Issued: 09/10/2019
• Est. Priority Date: 09/03/2013
• Status: Active Grant

• Current Assignee: Synopsys Incorporated
• Original Assignee: Synopsys Incorporated
• Inventors: Chen, Tung-Chieh, Pan, Po-Cheng, Chin, Ching-Yu, Chen, Hung-Ming
• Primary Examiner(s): Whitmore, Stacy
• Application Number:
  US14/475,276
• Publication Number:
  US 20150067632A1
• Time in Patent Office: 1,834 Days
• Field of Search: 716104, 716119, 716122, 716126, 716130
• CPC Class Codes: G06F 2119/20 Design reuse, reusability analysis or reusability optimisation
• CPC Class Codes: G06F 30/327 Logic synthesis; Behaviour synthesis, e.g. mapping logic, HDL to netlist, high-level language to RTL or netlist
• CPC Class Codes: G06F 30/39 Circuit design at the physical level physical level design for reconfigurable circuits G06F30/347
• CPC Class Codes: G06F 30/394 Routing G06F30/396 takes precedence
• CPC Class Codes: G06F 30/398 Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] optical proximity correction [OPC] design processes G03F1/36

Abstract

A computer implemented method for routing preservation is presented. The method includes decomposing, using the computer, a geometric relationship between a first module, a second module, and a routing path of a source layout, when the computer is invoked to route the solution path. The method further includes disposing, using the computer, the routing path in a solution layout in accordance with the geometric relationship. The solution layout is not defined by a scaling of the source layout.

Claims

1. A computer implemented method for routing a solution path of an integrated circuit design, the method comprising:

extracting, using the computer, from a source layout of the integrated circuit design a position of a source path disposed along a first side of a first block of the integrated circuit design and a first side of a second block of the integrated circuit design, when the computer is invoked to route the solution path; and

generating, using the computer, in a solution layout the solution path while maintaining the position of the source path along the first side of the first block and the first side of the second block, wherein a nearest distance between the first and second blocks in the source layout is scaled in the solution layout by a first number and at least one edge of either the first or second blocks in the source layout is scaled in the solution layout by a second number different from the first number.

2. The computer implemented method of claim 1 further comprising:

extracting, using the computer, from the source layout a position of the source path disposed along the first side of the first block and a first side of a third block after extracting the position of the source path disposed along the first side of the first block and the first side of the second block thereby hierarchically extracting the position of the source path; and

generating, using the computer, in the solution layout the solution path while maintaining the source path along the first side of the first block and the first side of the third block.

3. The computer implemented method of claim 2, wherein the first and second blocks are clustered in accordance with symmetry and proximity constraints.

4. The computer implemented method of claim 1, wherein the solution path is included in an analog circuit.

5. The computer implemented method of claim 1, wherein extracting further includes transforming the source layout into a planar straight-line graph via a triangulation algorithm.

6. The computer implemented method of claim 5, wherein transforming further includes generating a crossing graph associated with a plurality of crossing points disposed at the intersection between the source path and a plurality of edges dividing a source routing plane into a plurality of non-overlapping triangles except where the first and second blocks of the source layout are disposed.

7. The computer implemented method of claim 6, wherein the source routing plane is a region of the source layout where the source path is disposed.

8. The computer implemented method of claim 6, wherein at least one of the plurality of edges represents a geometrical relationship between the first block, the second block, of the source layout and the source routing plane.

9. The computer implemented method of claim 6, wherein the plurality of non-overlapping triangles include a plurality of vertices each disposed at a different one of a plurality of corners of the first block, the second block, and the source routing plane and disposed along at least a different one of a plurality of edges of the source routing plane.

10. The computer implemented method of claim 6, wherein transforming further includes storing at least one path direction associated with one of the plurality of crossing points.

11. The computer implemented method of claim 5, wherein the planar straight-line graph includes a plurality of edges dividing a source routing plane into a plurality of non-overlapping triangles except where the first and second blocks of the source layout are disposed, the source routing plane being a region of the source layout where the source path is disposed, wherein a pair of vertices define each different one of the plurality of edges when the pair of vertices are disposed on the same edge of one of the plurality of non-overlapping triangles or when the pair of vertices are disposed adjacently on the source path.

12. The computer implemented method of claim 6, wherein generating a solution path further includes:

recovering the planar straight-line graph in accordance with the solution layout; and

generating a plurality of segments in accordance with the plurality of crossing points included in the recovered planar straight-line graph, the solution path including the plurality of segments.

13. The computer implemented method of claim 12, wherein the plurality of non-overlapping triangles of the source layout include a plurality of vertices each disposed at a different one of a plurality of corners of the first block, the second block, the source routing plane and disposed along at least a different one of a plurality of edges of the source routing plane, wherein recovering the planar straight-line graph includes repositioning each of the plurality of vertices associated with the different ones of the plurality of corners when at least one of the plurality of corners is repositioned in the solution layout.

14. The computer implemented method of claim 12, wherein transforming further includes storing at least one path direction associated with one of the plurality of crossing points, wherein generating a plurality of segments is further in accordance with the at least one path direction.

15. A non-transitory computer-readable storage medium comprising instructions which when executed by a computer cause the computer to:

extract from a source layout of an integrated circuit design a position of a source path disposed along a first side of a first block of the integrated circuit design and a first side of a second block of the integrated circuit design, when the computer is invoked to route the solution path; and

generate in a solution layout the solution path while maintaining the position of the source path along the first side of the first block and the first side of the second block, wherein a nearest distance between the first and second blocks in the source layout is scaled in the solution layout by a first number and at least one edge of either the first or second blocks in the source layout is scaled in the solution layout by a second number different from the first number.

16. The non-transitory computer-readable storage medium of claim 15 further comprising instructions that cause the computer to:

extract from the source layout a position of the source path disposed along the first side of the first block and a first side of a third block after extracting the position of the source path disposed along the first side of the first block and the first side of the second block thereby hierarchically extracting the position of the source path; and

generate in the solution layout the solution path while maintaining the source path along the first side of the first block and the first side of the third block.

17. The non-transitory computer-readable storage medium of claim 16, wherein the first and second blocks are clustered in accordance with symmetry and proximity constraints.

18. The non-transitory computer-readable storage medium of claim 15, wherein the solution path is included in an analog circuit.

19. The non-transitory computer-readable storage medium of claim 15, wherein the instructions that cause the computer to extract further causes the computer to transform the source layout into a planar straight-line graph via a triangulation algorithm.

20. The non-transitory computer-readable storage medium of claim 19, wherein the instructions that cause the computer to transform further causes the computer to generate a crossing graph associated with a plurality of crossing points disposed at the intersection between the source path and a plurality of edges that divide a source routing plane into a plurality of non-overlapping triangles except where the first and second blocks of the source layout are disposed.

21. The non-transitory computer-readable storage medium of claim 20, wherein the source routing plane is a region of the source layout where the source path is disposed.

22. The non-transitory computer-readable storage medium of claim 20, wherein at least one of the plurality of edges represents a geometrical relationship between the first block, the second block, of the source layout and the source routing plane.

23. The non-transitory computer-readable storage medium of claim 20, wherein the plurality of non-overlapping triangles include a plurality of vertices each disposed at a different one of a plurality of corners of the first block, the second block, and the source routing plane and disposed along at least a different one of a plurality of edges of the source routing plane.

24. The non-transitory computer-readable storage medium of claim 20, wherein the instructions that causes the computer to transform further cause the computer to store at least one path direction associated with one of the plurality of crossing points.

25. The non-transitory computer-readable storage medium of claim 19, wherein the planar straight-line graph includes a plurality of edges that divide a source routing plane into a plurality of non-overlapping triangles except where the first and second blocks of the source layout are disposed, the source routing plane being a region of the source layout where the source path is disposed, wherein a pair of vertices define each different one of the plurality of edges when the pair of vertices are disposed on the same edge of one of the plurality of non-overlapping triangles or when the pair of vertices are disposed adjacently on the source path.

26. The non-transitory computer-readable storage medium of claim 20, wherein the instructions that cause the computer to generate a crossing graph further causes the computer to:

recover the planar straight-line graph in accordance with the solution layout; and

generate a plurality of segments in accordance with the plurality of crossing points included in the recovered planar straight-line graph, the solution path including the plurality of segments.

27. The non-transitory computer-readable storage medium of claim 26, wherein the plurality of non-overlapping triangles of the source layout include a plurality of vertices each disposed at a different one of a plurality of corners of the first block, the second block, the source routing plane and disposed along at least a different one of a plurality of edges of the source routing plane, wherein recovering the planar straight-line graph includes repositioning each of the plurality of vertices associated with the different ones of the plurality of corners when at least one of the plurality of corners is repositioned in the solution layout.

28. The non-transitory computer-readable storage medium of claim 26, wherein the instructions that cause the computer to transform further cause the computer to store at least one path direction associated with one of the plurality of crossing points, wherein the instructions that cause the computer to generate a plurality of segments are further in accordance with the at least one path direction.

29. A system for routing a solution path of an integrated circuit design, said system configured to:

extract from a source layout of the integrated circuit design a position of a source path disposed along a first side of a first block of the integrated circuit design and a first side of a second block of the integrated circuit design, when the computer is invoked to route the solution path; and

generate in a solution layout the solution path while maintaining the position of the source path along the first side of the first block and the first side of the second block, wherein a nearest distance between the first and second blocks in the source layout is scaled in the solution layout by a first number and at least one edge of either the first or second blocks in the source layout is scaled in the solution layout by a second number different from the first number.

30. The system of claim 29 further configured to:

extract from the source layout a position of the source path disposed along the first side of the first block and a first side of a third block after extracting the position of the source path disposed along the first side of the first block and the first side of the second block thereby hierarchically extracting the position of the source path; and

generate in the solution layout the solution path while maintaining the source path along the first side of the first block and the first side of the third block.

31. The system of claim 30, wherein the first and second blocks are clustered in accordance with symmetry and proximity constraints.

32. The system of claim 29, wherein the solution path is included in an analog circuit.

33. The system of claim 29 further configured to transform the source layout into a planar straight-line graph via a triangulation algorithm.

34. The system of claim 33 further configured to generate a crossing graph associated with a plurality of crossing points disposed at the intersection between the source path and a plurality of edges that divide a source routing plane into a plurality of non-overlapping triangles except where the first and second blocks of the source layout are disposed.

35. The system of claim 34, wherein the source routing plane is a region of the source layout where the source path is disposed.

36. The system of claim 34, wherein at least one of the plurality of edges represents a geometrical relationship between the first block, the second block, of the source layout and the source routing plane.

37. The system of claim 34, wherein the plurality of non-overlapping triangles include a plurality of vertices each disposed at a different one of a plurality of corners of the first block, the second block, and the source routing plane and disposed along at least a different one of a plurality of edges of the source routing plane.

38. The system of claim 34 further configured to store at least one path direction associated with one of the plurality of crossing points.

39. The system of claim 33, wherein the planar straight-line graph includes a plurality of edges that divide a source routing plane into a plurality of non-overlapping triangles except where the first and second blocks of the source layout are disposed, the source routing plane being a region of the source layout where the source path is disposed, wherein a pair of vertices define each different one of the plurality of edges when the pair of vertices are disposed on the same edge of one of the plurality of non-overlapping triangles or when the pair of vertices are disposed adjacently on the source path.

40. The system of claim 34 further configured to:

recover the planar straight-line graph in accordance with the solution layout; and

generate a plurality of segments in accordance with the plurality of crossing points included in the recovered planar straight-line graph, the solution path including the plurality of segments.

41. The system of claim 40, wherein the plurality of non-overlapping triangles of the source layout include a plurality of vertices each disposed at a different one of a plurality of corners of the first block, the second block, the source routing plane and disposed along at least a different one of a plurality of edges of the source routing plane, wherein recovering the planar straight-line graph includes repositioning each of the plurality of vertices associated with the different ones of the plurality of corners when at least one of the plurality of corners is repositioned in the solution layout.

42. The system of claim 40 further configured to store at least one path direction associated with one of the plurality of crossing points, wherein the instructions that cause the computer to generate a plurality of segments are further in accordance with the at least one path direction.