Semiconductor light-emitting device including penetrating trenches

• US 10,411,162 B2
• Filed: 09/14/2016
• Issued: 09/10/2019
• Est. Priority Date: 08/27/2013
• Status: Active Grant

• Current Assignee: Epistar Corporation (Ennostar, Inc.)
• Original Assignee: Epistar Corporation (Ennostar, Inc.)
• Inventors: Chen, Chao-Hsing, Wang, Jia-Kuen, Tseng, Tzu-Yao, Chiang, Tsung-Hsun, Hu, Bo-Jiun, Chuang, Wen-Hung, Lin, Yu-Ling
• Primary Examiner(s): Ahmadi, Mohsen
• Application Number:
  US15/265,069
• Publication Number:
  US 20170005232A1
• Time in Patent Office: 1,091 Days
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 33/00 Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof H10K50/00 takes precedence; devices consisting of a plurality of semiconductor components formed in or on a common substrate and including semiconductor components having potential barriers, specially adapted for light emission H01L27/15; semiconductor lasers H01S5/00
• CPC Class Codes: H01L 33/0012 p-i-n devices
• CPC Class Codes: H01L 33/02 characterised by the semiconductor bodies
• CPC Class Codes: H01L 33/08 with a plurality of light emitting regions, e.g. laterally discontinuous light emitting layer or photoluminescent region integrated within the semiconductor body H01L27/15 takes precedence
• CPC Class Codes: H01L 33/10 with a light reflecting structure, e.g. semiconductor Bragg reflector
• CPC Class Codes: H01L 33/22 Roughened surfaces, e.g. at the interface between epitaxial layers
• CPC Class Codes: H01L 33/24 of the light emitting region, e.g. non-planar junction
• CPC Class Codes: H01L 33/38 with a particular shape
• CPC Class Codes: H01L 33/382 the electrode extending partially in or entirely through the semiconductor body
• CPC Class Codes: H01L 33/385 the electrode extending at least partially onto a side surface of the semiconductor body
• CPC Class Codes: H01L 33/387 with a plurality of electrode regions in direct contact with the semiconductor body and being electrically interconnected by another electrode layer
• CPC Class Codes: H01L 33/405 Reflective materials
• CPC Class Codes: H01L 33/42 Transparent materials
• CPC Class Codes: H01L 33/44 characterised by the coatings, e.g. passivation layer or anti-reflective coating
• CPC Class Codes: H01L 33/46 Reflective coating, e.g. dielectric Bragg reflector
• CPC Class Codes: H01L 33/62 Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Abstract

A semiconductor light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer; a plurality of first trenches penetrating the second semiconductor layer and the active layer to expose the first semiconductor layer; a second trench penetrating the second semiconductor layer and the active layer to expose the first semiconductor layer, wherein the second trench is disposed near an outmost edge of the active layer, and surrounds the active layer and the plurality of first trenches; a patterned metal layer formed on the second semiconductor layer and formed in one of the plurality of first trenches or the second trench; and a first pad portion and a second pad portion both formed on the second semiconductor layer and electrically connecting the second semiconductor layer and the first semiconductor layer respectively.

Claims

1. A semiconductor light-emitting device, comprising:

a substrate;

a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer formed on the substrate;

a plurality of semiconductor constructions formed on the substrate, respectively comprising the first semiconductor layer, the second semiconductor layer, and the active layer;

a plurality of first trenches penetrating the second semiconductor ;

layer and the active layer to expose the first semiconductor layer;

a second trench penetrating the second semiconductor layer and the active layer to expose a periphery region of the first semiconductor layer, wherein the second trench is disposed near an outmost edge of the active layer, and surrounds the plurality of semiconductor constructions and the plurality of first trenches, wherein the first semiconductor layer of each of the plurality of semiconductor constructions are connected to each other through the first semiconductor layer exposed by the plurality of first trenches and the second trench in a cross-sectional view of the semiconductor light-emitting device, and the second semiconductor layer of each of the plurality of semiconductor constructions are separated from each other by one of the plurality of first trenches in a top view of the semiconductor light-emitting device;

a patterned metal layer formed on the plurality of semiconductor constructions and filling in the plurality of first trenches and the second trench;

a plurality of first pad portions physically separated from each other, respectively formed on the second semiconductor layer of each of the plurality of semiconductor constructions; and

a plurality of second pad portions physically separated from each other, respectively formed on the second semiconductor layer of each of the plurality of semiconductor constructions,

wherein the periphery region of first semiconductor layer comprises a top surface exposed by the second trench and a periphery side surface connecting to the top surface of the first semiconductor layer of the periphery region,

wherein the periphery side surface is an exposed outermost side surface of the first semiconductor layer of the periphery region, and

wherein the patterned metal layer comprises a plurality of first metal regions physically separated from each other, respectively formed on the second semiconductor layer of each of the plurality of semiconductor constructions, and a second metal region electrically isolated to the plurality of first metal regions, and portions of the second metal region are formed in the plurality of first trenches and the second trench.

2. The semiconductor light-emitting device of claim 1, wherein a width of one of the plurality of first trenches is greater than a width of the second trench.

3. The semiconductor light-emitting device of claim 1, wherein the plurality of first pad portions is aligned with the plurality of second pad portions.

4. The semiconductor light-emitting device of claim 1, wherein in a top view, a shape composed by the plurality of first trenches and the second trench comprises a plurality of rectangles, and the plurality of first pad portions and the plurality of second pad portions are respectively disposed in the plurality of rectangles.

5. The semiconductor light-emitting device of claim 1, wherein the plurality of first trenches is parallel to one another in the top view of the semiconductor light-emitting device.

6. The semiconductor light-emitting device of claim 1, further comprising a transparent conductive layer formed on the second semiconductor layers of each of the plurality of semiconductor constructions.

7. The semiconductor light-emitting device of claim 6, wherein the transparent conductive layer comprises indium tin oxide (ITO) or indium zinc oxide (IZO).

8. The semiconductor light-emitting device of claim 6, further comprising a reflective layer formed on the transparent conductive layer of the plurality of semiconductor constructions.

9. The semiconductor light-emitting device of claim 1, further comprising a reflective layer formed on the second semiconductor layers of the plurality of semiconductor constructions.

10. The semiconductor light-emitting device of claim 9, further comprising a second insulating layer covers the plurality of semiconductor constructions, wherein the second insulating layer comprises a plurality of second insulating openings respectively exposing the reflective layer of the plurality of semiconductor constructions.

11. The semiconductor light-emitting device of claim 10, wherein the second insulating layer comprises a distributed Bragg reflector (DBR) which includes a plurality pairs of sub-layers, and each sub-layer has a refractive index different from that of adjacent sub-layers.

12. The semiconductor light-emitting device of claim 1, further comprising a first insulating layer covering the periphery side surface.

13. The semiconductor light-emitting device of claim 1, wherein the plurality of first trenches are connected to the second trench in the top view of the semiconductor light-emitting device.

14. A semiconductor light-emitting device, comprising:

a substrate;

a first semiconductor layer formed on the substrate;

a plurality of semiconductor constructions formed on the substrate, respectively comprising the first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer;

a plurality of first trenches exposing the first semiconductor layer;

a second trench exposing a periphery region of the first semiconductor layer, wherein the second trench is disposed near an outmost edge of the active layer, and surrounds the plurality of semiconductor constructions and the plurality of first trenches, wherein the first semiconductor layer of each of the plurality of semiconductor constructions are connected to each other through the first semiconductor layer exposed by the plurality of first trenches and the second trench in a cross-sectional view of the semiconductor light-emitting device, and the second semiconductor layer of each of the plurality of semiconductor constructions are separated from each other in a top view of the semiconductor light-emitting device;

a patterned metal layer formed on the plurality of semiconductor constructions and filling in the plurality of first trenches and the second trench;

a plurality of first pad portions respectively formed on the second semiconductor layer of each of the plurality of semiconductor constructions;

a plurality of second pad portions respectively formed on the second semiconductor layer of each of the plurality of semiconductor constructions,

wherein the periphery region of first semiconductor layer comprises a top surface exposed by the second trench and a periphery side surface connecting to the top surface of the first semiconductor layer of the periphery region,

wherein the periphery side surface is an exposed outermost side surface of the first semiconductor layer of the periphery region, and

wherein the patterned metal layer comprises a plurality of first metal regions respectively formed on the second semiconductor layers of the plurality of semiconductor constructions, and a second metal region electrically isolated to the plurality of first metal regions, and portions of the second metal region are formed in the plurality of first trenches and the second trench; and

a third insulating layer covering the plurality of semiconductor constructions, wherein the third insulating layer comprises a first group of third insulating openings respectively exposing the plurality of first metal regions, and a second group of third insulating openings respectively exposing the second metal region of the plurality of semiconductor constructions.

15. The semiconductor light-emitting device of claim 14, wherein the plurality of first pad portions is aligned with the plurality of second pad portions.

16. The semiconductor light-emitting device of claim 14, further comprising a transparent conductive layer formed on the second semiconductor layers of each of the plurality of semiconductor constructions.

17. The semiconductor light-emitting device of claim 14, further comprising a reflective layer formed on the second semiconductor layers of the plurality of semiconductor constructions.

18. The semiconductor light-emitting device of claim 17, further comprising a second insulating layer covering the plurality of semiconductor constructions, wherein the second insulating layer comprises a plurality of second insulating openings respectively exposing the reflective layer of the plurality of semiconductor constructions.

19. The semiconductor light-emitting device of claim 14, wherein the plurality of first trenches are connected to the second trench in the top view of the semiconductor light-emitting device.