Apparatus and method for sending power over synchronous serial communication wiring

• US 10,417,143 B2
• Filed: 10/06/2016
• Issued: 09/17/2019
• Est. Priority Date: 10/08/2015
• Status: Active Grant

• Current Assignee: Esker Technologies, LLC
• Original Assignee: Esker Technologies, LLC
• Inventors: Olmstead, Brian S.
• Primary Examiner(s): Misiura, Brian T
• Application Number:
  US15/287,470
• Publication Number:
  US 20170103027A1
• Time in Patent Office: 1,076 Days
• Field of Search: 710 62
• CPC Class Codes: G06F 13/102 where the programme performs an interfacing function, e.g. device driver G06F13/105 takes precedence; scheduling within device drivers G06F9/52; contention policies within device drivers G06F9/4881
• CPC Class Codes: G06F 13/4068 Electrical coupling
• CPC Class Codes: G06F 13/4282 on a serial bus, e.g. I2C bus, SPI bus on daisy chain buses G06F13/4247

Abstract

Data and power are transmitted a master to a peripheral, with power communicated from a controller circuit board to the peripheral circuit board across data lines. Power is transmitted from the voltage regulator of the controller circuit board to an SPI or SSI master. Power over Synchronous Serial Interface (SSI) and Serial Peripheral Interface (SPI) uses Ethernet cable or custom 2 to 4-pair cable to move power high speed data between a microprocessor and a peripheral.

Claims

1. A system for communicating data and power from a controller to a peripheral, the system comprising:

a controller carrying at least one of a synchronous serial peripheral interface and serial synchronous interface master, said at least one of said serial peripheral interface and serial synchronous interface master transmitting data and clock signals to an XOR gate, said XOR gate coupled to a differential line driver, said differential line driver coupled to a PoE transformer, said PoE transformer coupled to a source of DC, a first twisted pair of wires coupling said controller and a peripheral circuit board, said first twisted pair of wires carrying DC between said controller and said peripheral circuit board;

said XOR gate converting said data from return-to-zero formatting to non-return-to-zero formatting, said XOR gate removing a DC component from said data, said data communicated through said PoE transformer;

a second twisted pair of wires coupling said controller and said peripheral circuit board, said second twisted pair of wires carrying said clock signal and DC between said controller and peripheral circuit board.