Interconnection structures and methods for transfer-printed integrated circuit elements with improved interconnection alignment tolerance
First Claim
1. An electronic component array, comprising:
- a backplane substrate;
a plurality of integrated circuit elements disposed on the backplane substrate, each of the integrated circuit elements comprising a chiplet substrate, a connection pad disposed on a surface of the chiplet substrate, and a conductor element disposed on the surface of the chiplet substrate, wherein the connection pad and the conductor element are physically and electrically separated by an insulating layer that exposes at least a portion of the connection pad and is in contact with and covers the conductor element, and wherein at least one of the integrated circuit elements is misaligned on the backplane substrate relative to a desired position thereon at a distance from the desired position that is greater than or equal to a distance between the conductor element and the connection pad; and
a plurality of conductive wires on the backplane substrate that each extend over and in contact with the insulating layer, wherein the connection pad of each of the plurality of integrated circuit elements is electrically connected to a respective one of the conductive wires and the conductor element is insulated from each of the plurality of conductive wires by the insulating layer, notwithstanding that the at least one of the integrated circuit elements is misaligned on the backplane substrate.
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0 Petitions
Accused Products
Abstract
An electronic component array includes a backplane substrate, and a plurality of integrated circuit elements on the backplane substrate. Each of the integrated circuit elements includes a chiplet substrate having a connection pad and a conductor element on a surface thereof. The connection pad and the conductor element are electrically separated by an insulating layer that exposes at least a portion of the connection pad. At least one of the integrated circuit elements is misaligned on the backplane substrate relative to a desired position thereon. A plurality of conductive wires are provided on the backplane substrate including the integrated circuit elements thereon, and the connection pad of each of the integrated circuit elements is electrically connected to a respective one of the conductive wires notwithstanding the misalignment of the at least one of the integrated circuit elements. Related fabrication methods are also discussed.
274 Citations
12 Claims
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1. An electronic component array, comprising:
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a backplane substrate; a plurality of integrated circuit elements disposed on the backplane substrate, each of the integrated circuit elements comprising a chiplet substrate, a connection pad disposed on a surface of the chiplet substrate, and a conductor element disposed on the surface of the chiplet substrate, wherein the connection pad and the conductor element are physically and electrically separated by an insulating layer that exposes at least a portion of the connection pad and is in contact with and covers the conductor element, and wherein at least one of the integrated circuit elements is misaligned on the backplane substrate relative to a desired position thereon at a distance from the desired position that is greater than or equal to a distance between the conductor element and the connection pad; and a plurality of conductive wires on the backplane substrate that each extend over and in contact with the insulating layer, wherein the connection pad of each of the plurality of integrated circuit elements is electrically connected to a respective one of the conductive wires and the conductor element is insulated from each of the plurality of conductive wires by the insulating layer, notwithstanding that the at least one of the integrated circuit elements is misaligned on the backplane substrate. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A structure for printing transferrable integrated circuit chiplets, comprising:
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a source substrate; a patterned sacrificial layer on the source substrate; and a plurality of integrated circuit chiplets disposed on the patterned sacrificial layer, wherein each of the plurality of integrated circuit chiplets comprises; a separate chiplet substrate detached from the source substrate by a pattern of the sacrificial layer; a tether connecting the separate chiplet substrate to an anchor disposed on the source substrate; active elements disposed on or in the chiplet substrate; a connection pad disposed on a surface of the chiplet substrate; chiplet wires disposed on or in the chiplet substrate electrically connecting the active elements and the connection pad; a conductor element physically and electrically separate from the connection pad disposed on the surface of the chiplet substrate, the conductor element electrically connected to at least one of a chiplet wire and one of the active elements; and an insulating layer disposed on the chiplet substrate and the conductor element, the insulating layer (i) leaving at least a portion of the connection pad exposed and (ii) in contact with and covering the conductor element. - View Dependent Claims (11)
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12. A structure for printing transferrable integrated circuit chiplets, comprising:
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a substrate; a patterned sacrificial layer on the substrate; and a plurality of integrated circuit chiplets disposed on the patterned sacrificial layer, wherein each of the plurality of integrated circuit chiplets comprises; a separate chiplet substrate detached from the substrate by a pattern of the sacrificial layer; active elements disposed on or in the chiplet substrate; a connection pad disposed on a surface of the chiplet substrate; chiplet wires disposed on or in the chiplet substrate electrically connecting the active elements and the connection pad; a conductor electrically-separate from the connection pad on the surface of the chiplet substrate, the conductor electrically connected to at least one of a chiplet wire and one of the active elements; and an insulating layer disposed on the chiplet substrate and the conductor, the insulating layer leaving at least a portion of the connection pad exposed, and further comprising one or more exposed electrical test pads, a plurality of electrically conductive tethers, and anchors disposed on the substrate, each anchor located over and in contact with the patterned sacrificial layer and having a tether of the plurality of electrically conductive tethers connecting the anchor to one of the plurality of integrated circuit chiplets and one or more of the one or more exposed electrical test pads disposed in the anchor, wherein the tether electrically connects active elements in the one of the plurality of integrated circuit chiplets to the one or more exposed electrical test pads disposed in the anchor.
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Specification