Sensor chip and electronic apparatus

• US 10,418,405 B2
• Filed: 09/05/2017
• Issued: 09/17/2019
• Est. Priority Date: 09/05/2017
• Status: Active Grant

• Current Assignee: Sony Semiconductor Solutions Corporation (Sony Group Corp.)
• Original Assignee: Sony Semiconductor Solutions Corporation (Sony Group Corp.)
• Inventors: Yasu, Yohtaro, Hanzawa, Katsuhiko
• Primary Examiner(s): Tran, Thien F
• Application Number:
  US15/695,400
• Publication Number:
  US 20190074315A1
• Time in Patent Office: 742 Days
• Field of Search: None
• CPC Class Codes: G01S 7/4863 Detector arrays, e.g. charge-transfer gates
• CPC Class Codes: H01L 27/14634 Assemblies, i.e. Hybrid structures
• CPC Class Codes: H01L 27/14636 Interconnect structures
• CPC Class Codes: H04N 25/53 Control of the integration time
• CPC Class Codes: H04N 25/74 Circuitry for scanning or addressing the pixel array
• CPC Class Codes: H04N 25/745 Circuitry for generating timing or clock signals
• CPC Class Codes: H04N 25/75 Circuitry for providing, modifying or processing image signals from the pixel array
• CPC Class Codes: H04N 25/79 Arrangements of circuitry being divided between different or multiple substrates, chips or circuit boards, e.g. stacked image sensors

Abstract

A sensor chip includes: a pixel array unit that has a rectangular-shaped area in which a plurality of sensor elements are arranged in an array pattern; and a global control circuit, in which driving elements simultaneously driving the sensor elements are arranged in one direction, and each of the driving elements is connected to a control line disposed for each one column of the sensor elements, that is arranged to have a longitudinal direction to be along a long side of the pixel array unit. For example, the present technology can be applied to ToF sensor.

Claims

1. A time of flight sensor comprising;

a first substrate including a pixel array, the pixel array including a plurality of pixels arranged in rows and columns;

a second substrate including a global control circuit, a rolling control circuit and a column circuit, wherein

the global control circuit is configured to output global control signals to the plurality of pixels,

the rolling control circuit is configured to output rolling control signals to the plurality of pixels, and

the column circuit is coupled to the plurality of pixels, the column circuit including a plurality of analog to digital converters,

wherein the global control circuit is disposed along a first side of the pixel array, the rolling control circuit is disposed along a second side of the pixel array, the first side is perpendicular to the second side, the column circuit is disposed along a third side of the pixel array, and the third side is parallel to the first side; and

a first plurality of vias disposed along the first side of the pixel array.

2. The time of flight sensor according to claim 1, further comprising:

a second plurality of vias disposed along the second side of the pixel array.

3. The time of flight sensor according to claim 2, further comprising:

a third plurality of vias disposed along the third side of the pixel array.

4. The time of flight sensor according to claim 3, wherein the global control circuit is coupled to the plurality of pixels through the first plurality of vias.

5. The time of flight sensor according to claim 4, wherein the rolling control circuit is coupled to the plurality of pixels through the second plurality of vias.

6. The time of flight sensor according to claim 5, wherein the column circuit is coupled to the plurality of pixels through the third plurality of vias.

7. The time of flight sensor according to claim 6, wherein a logic circuit is coupled to the column circuit and is disposed between the column circuit and the global control circuit.

8. The time of flight sensor according to claim 7, wherein the first, second, and third plurality of vias are disposed outside of the pixel array.

9. A time of flight sensor comprising;

a first substrate including a pixel array, the pixel array including a plurality of pixels arranged in rows and columns;

a second substrate including a first pixel driving circuit, a second pixel driving circuit, and a column circuit, wherein

the first pixel driving circuit is configured to output a first pixel driving signal to the plurality of pixels,

the second pixel driving circuit is configured to output a second pixel driving signal to the plurality of pixels, and

the column circuit is coupled to the plurality of pixels, the column circuit including a plurality of analog to digital converters,

wherein the first pixel driving circuit is disposed along a first side of the pixel array, the second pixel driving circuit is disposed along a second side of the pixel array, the first side is perpendicular to the second side, the column circuit is disposed along a third side of the pixel array, and the third side is parallel to the first side; and

a first plurality of vias disposed along the first side of the pixel array.

10. The time of flight sensor according to claim 9, further comprising:

a second plurality of vias disposed along the second side of the pixel array.

11. The time of flight sensor according to claim 10, further comprising:

a third plurality of vias disposed along the third side of the pixel array.

12. The time of flight sensor according to claim 11, wherein the first pixel driving circuit is coupled to the plurality of pixels through the first plurality of vias.

13. The time of flight sensor according to claim 12, wherein the second pixel driving circuit is coupled to the plurality of pixels through the second plurality of vias.

14. The time of flight sensor according to claim 13, wherein the column circuit is coupled to the plurality of pixels through the third plurality of vias.

15. The time of flight sensor according to claim 14, wherein a logic circuit is coupled to the column circuit and is disposed between the column circuit and the first pixel driving circuit.

16. The time of flight sensor according to claim 10, wherein the first, second, and third plurality of vias are disposed outside of the pixel array.

17. The time of flight sensor according to claim 16, wherein the first pixel driving circuit comprises a first internal buffer and a first driving circuit, wherein an output of the first internal buffer is coupled to an input of the first driving circuit.

18. The time of flight sensor according to claim 17, wherein the first pixel driving circuit includes a connection configuration that incorporates a clock tree structure.

19. The time of flight sensor according to claim 9, wherein the second pixel driving circuit includes a shift register circuit.