Semiconductor device and method for manufacturing the same

• US 10,418,466 B2
• Filed: 02/14/2017
• Issued: 09/17/2019
• Est. Priority Date: 09/24/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Tsuji, Takahiro, Suzuki, Kunihiko
• Primary Examiner(s): Slutsker, Julia
• Application Number:
  US15/432,077
• Publication Number:
  US 20170154983A1
• Time in Patent Office: 945 Days
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02595 polycrystalline
• CPC Class Codes: H01L 21/02667 Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
• CPC Class Codes: H01L 22/14 for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/04 characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes characterised by physical imperfections H01L29/30
• CPC Class Codes: H01L 29/66742 Thin film unipolar transistors
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

An object is to provide a high reliability thin film transistor using an oxide semiconductor layer which has stable electric characteristics. In the thin film transistor in which an oxide semiconductor layer is used, the amount of change in threshold voltage of the thin film transistor before and after a BT test is made to be 2 V or less, preferably 1.5 V or less, more preferably 1 V or less, whereby the semiconductor device which has high reliability and stable electric characteristics can be manufactured. In particular, in a display device which is one embodiment of the semiconductor device, a malfunction such as display unevenness due to change in threshold voltage can be reduced.

Claims

1. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode layer over a substrate having an insulating surface;

forming a gate insulating layer over the gate electrode layer;

forming an oxide semiconductor layer over the gate insulating layer;

performing a first heat treatment after the oxide semiconductor layer is formed;

forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer after performing the first heat treatment;

forming an inorganic insulating layer over the gate insulating layer, the oxide semiconductor layer, the source electrode layer, and the drain electrode layer, wherein the inorganic insulating layer is in contact with part of the oxide semiconductor layer and entirely covers the source electrode layer and the drain electrode layer; and

performing a second heat treatment after the inorganic insulating layer is formed,

wherein a temperature of the second heat treatment is lower than a temperature of the first heat treatment,

wherein the inorganic insulating layer comprises a silicon oxide layer, a silicon nitride oxide layer, a silicon nitride layer, an aluminum oxide layer, or an aluminum oxynitride layer, and

wherein the oxide semiconductor layer is crystallized after the first heat treatment.

2. The method for manufacturing a semiconductor device according to claim 1, wherein the temperature of the first heat treatment is higher than or equal to 350°

C. and lower than or equal to 750°

C.

3. The method for manufacturing a semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises indium and zinc.

4. The method for manufacturing a semiconductor device according to claim 1, wherein the oxide semiconductor layer is crystallized to be a microcrystalline layer after the first heat treatment.

5. The method for manufacturing a semiconductor device according to claim 1, wherein the oxide semiconductor layer is crystallized to be a polycrystalline layer after the first heat treatment.

6. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode layer over a substrate having an insulating surface;

forming a gate insulating layer over the gate electrode layer;

forming an oxide semiconductor layer over the gate insulating layer;

performing a first heat treatment in a nitrogen atmosphere after the oxide semiconductor layer is formed;

forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer after performing the first heat treatment;

forming an inorganic insulating layer over the gate insulating layer, the oxide semiconductor layer, the source electrode layer, and the drain electrode layer, wherein the inorganic insulating layer is in contact with part of the oxide semiconductor layer and entirely covers the source electrode layer and the drain electrode layer; and

performing a second heat treatment after the inorganic insulating layer is formed,

wherein a temperature of the second heat treatment is lower than a temperature of the first heat treatment,

wherein the inorganic insulating layer comprises a silicon oxide layer, a silicon nitride oxide layer, a silicon nitride layer, an aluminum oxide layer, or an aluminum oxynitride layer, and

wherein the oxide semiconductor layer is crystallized after the first heat treatment.

7. The method for manufacturing a semiconductor device according to claim 6, wherein the temperature of the first heat treatment is higher than or equal to 350°

C. and lower than or equal to 750°

C.

8. The method for manufacturing a semiconductor device according to claim 6, wherein the oxide semiconductor layer comprises indium and zinc.

9. The method for manufacturing a semiconductor device according to claim 6, wherein the oxide semiconductor layer is crystallized to be a microcrystalline layer after the first heat treatment.

10. The method for manufacturing a semiconductor device according to claim 6, wherein the oxide semiconductor layer is crystallized to be a polycrystalline layer after the first heat treatment.

11. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode layer over a substrate having an insulating surface;

forming a gate insulating layer over the gate electrode layer;

forming an oxide semiconductor layer over the gate insulating layer;

performing a first heat treatment after the oxide semiconductor layer is formed;

forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer after performing the first heat treatment;

forming an inorganic insulating layer over the oxide semiconductor layer, the source electrode layer, and the drain electrode layer, wherein the inorganic insulating layer entirely covers the source electrode layer and the drain electrode layer;

performing a second heat treatment after the inorganic insulating layer is formed,

wherein a temperature of the second heat treatment is lower than a temperature of the first heat treatment, and

wherein the oxide semiconductor layer is crystallized after the first heat treatment.

12. The method for manufacturing a semiconductor device according to claim 11, wherein the temperature of the first heat treatment is higher than or equal to 350°

C. and lower than or equal to 750°

C.

13. The method for manufacturing a semiconductor device according to claim 11, wherein the oxide semiconductor layer comprises indium and zinc.