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Tight pitch stack nanowire isolation

  • US 10,418,493 B2
  • Filed: 12/19/2017
  • Issued: 09/17/2019
  • Est. Priority Date: 12/19/2017
  • Status: Active Grant
First Claim
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1. A method for forming a stacked nanowire transistor, comprising:

  • forming a base nanosheet on a substrate;

    forming at least one fin, and at least one dummy gate over the at least one fin, on the base nanosheet, the at least one fin including at least two alternating layers of a first material and a second material;

    replacing the base nanosheet with a blanket dielectric to form a shallow trench isolation (STI) around the at least one fin and around the at least one dummy gate and having a substantially uniform thickness over the substrate; and

    performing a gate replacement to replace the at least one dummy gate and the second material with a gate conductor material and a gate cap to form gate structures.

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