Tight pitch stack nanowire isolation
First Claim
1. A method for forming a stacked nanowire transistor, comprising:
- forming a base nanosheet on a substrate;
forming at least one fin, and at least one dummy gate over the at least one fin, on the base nanosheet, the at least one fin including at least two alternating layers of a first material and a second material;
replacing the base nanosheet with a blanket dielectric to form a shallow trench isolation (STI) around the at least one fin and around the at least one dummy gate and having a substantially uniform thickness over the substrate; and
performing a gate replacement to replace the at least one dummy gate and the second material with a gate conductor material and a gate cap to form gate structures.
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Accused Products
Abstract
Devices and methods for forming a tight pitch stack nanowire without shallow trench isolation including a base nanosheet formed on a substrate. At least one fin are formed, and at least one dummy gate is formed over the at least two fins, on the base nanosheet, the at least two fins including at least two alternating layers of a first material and a second material. The base nanosheet is replaced with a blanket dielectric to form a shallow trench isolation (STI) around the at least one fin and around the at least one dummy gate. A gate replacement is performed to replace the at least one dummy gate and the second material with a gate conductor material and a gate cap to form gate structures.
19 Citations
16 Claims
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1. A method for forming a stacked nanowire transistor, comprising:
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forming a base nanosheet on a substrate; forming at least one fin, and at least one dummy gate over the at least one fin, on the base nanosheet, the at least one fin including at least two alternating layers of a first material and a second material; replacing the base nanosheet with a blanket dielectric to form a shallow trench isolation (STI) around the at least one fin and around the at least one dummy gate and having a substantially uniform thickness over the substrate; and performing a gate replacement to replace the at least one dummy gate and the second material with a gate conductor material and a gate cap to form gate structures. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method for forming a stacked nanowire transistor, comprising:
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forming a base nanosheet on a substrate; forming at least two fins, and at least one dummy gate over the at least two fins, on the base nanosheet, the at least two fins including at least two alternating layers of a first material and a second material; etching the base nanosheet from beneath the at least two fins and the at least one dummy gate to form a cavity beneath the at least two fins and the at least one dummy gate; filling the cavity with a blanket dielectric to form a shallow trench isolation (STI) beneath and between each of the at least two fins and beneath and around the at least one dummy gate and having a substantially uniform thickness over the substrate; and performing a gate replacement to replace the at least one dummy gate and the second material with a gate conductor material and a gate cap to form gate structures. - View Dependent Claims (11, 12, 13, 14, 15, 16)
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Specification