Information processing device and memory controller

• US 10,423,343 B2
• Filed: 06/08/2017
• Issued: 09/24/2019
• Est. Priority Date: 07/29/2016
• Status: Active Grant

• Current Assignee: Fujitsu Limited
• Original Assignee: Fujitsu Limited
• Inventors: Sato, Mitsuru
• Primary Examiner(s): Tsai, Sheng Jen
• Application Number:
  US15/616,989
• Publication Number:
  US 20180032272A1
• Time in Patent Office: 838 Days
• Field of Search: 711102
• CPC Class Codes: G06F 11/07 Responding to the occurrence of a fault, e.g. fault tolerance
• CPC Class Codes: G06F 11/0778 Dumping, i.e. gathering error/state information after a fault for later diagnosis
• CPC Class Codes: G06F 12/0638 Combination of memories, e.g. ROM and RAM such as to permit replacement or supplementing of words in one module by words in another module address formation of the next microinstruction G06F9/26; masking faults in memories by using spares or by reconfiguring G11C29/70
• CPC Class Codes: G06F 2212/1024 Latency reduction
• CPC Class Codes: G06F 2212/205 Hybrid memory, e.g. using both volatile and non-volatile memory
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/065 Replication mechanisms
• CPC Class Codes: G06F 3/0688 Non-volatile semiconductor memory arrays

Abstract

An information processing device includes a main memory including a non-volatile memory and a volatile memory with access speed higher than the non-volatile memory, the volatile memory storing data in the non-volatile memory, a processor that issues a read request, a write request and a snapshot request and a memory controller that reads, in response to the read request, data in the volatile memory, writes, in response to the write request, write data in the volatile memory and also writes a write history in a sequential manner to the non-volatile memory, performs, in response to the snapshot request, snapshot processing of recording in non-volatile memory a write position of the write history up to a time of a snapshot, and performs, after the snapshot processing, data restoration processing of writing the written data at the write position in the write history to the non-volatile memory.

Claims

1. An information processing device comprising:

a main memory that includes a non-volatile memory and a volatile memory that has access speed higher than the non-volatile memory, the volatile memory storing at least a part of data in a data area of the non-volatile memory;

a processor that issues a read request, a write request and a snapshot request to data in the main memory; and

a memory controller that processes the request from the processor, the memory controller;

reads, in response to the read request, data corresponding to the read request in the volatile memory,

writes, in response to the write request, write data to an area corresponding to the write request in the volatile memory and also writes a write history in a sequential manner to one of a plurality of entries of a log memory area in the non-volatile memory,

performs, in response to the snapshot request, snapshot processing of recording a mark bit having a first value in the entry in which the write history is written immediately before a time of the snapshot request,

performs, after the snapshot processing, data restoration processing of writing write data of the write history written in an entry or entries, up to the entry in which the mark bit having the first value is recorded, among the plurality of entries of the log memory area to a data area of the non-volatile memory, and changes the mark bit having the first value to a second value when the data restoration processing is completed, and

when an operation is resumed after the snapshot processing,

performs the data restoration processing if the mark bit having the first value is recorded in an entry of the log memory area, and changes the mark bit having the first value to the second value when the data restoration processing is completed, and

does not perform the data restoration processing if the mark bit having the first value is not recorded in an entry of the log memory area.

2. The information processing device according to claim 1, wherein

the memory controller clears, when an operation is resumed after an interruption of power after the snapshot processing, data in the volatile memory and also clears the write history written after the snapshot in the non-volatile memory, and

writes, in response to the read request, data at an address of the read request in a data area of the non-volatile memory into the volatile memory and output a data response to the processor.

3. The information processing device according to claim 1, wherein

the write history includes a write address and write data, and

the memory controller, in the data restoration processing, writes the write data to a data area of the non-volatile memory, based on the write address in the write history.

4. The information processing device according to claim 3, wherein

each of the plurality of entries of the log memory area records each write address, write data, and the mark bit, and

the memory controller reads the written data in the entry for up to the entry in which the mark bit having the first value is recorded and writes the written data that is read in a data area of the non-volatile memory in the data restoration processing.

5. The information processing device according to claim 4, wherein

the log memory area further stores a read pointer indicating a read position for the write history in the entry,

the read pointer is updated each time the written data in the entry is read and written to a data area of the non-volatile memory in the data restoration processing, and

the data restoration processing is performed from an entry of the read pointer up to an entry of the mark bit having the first value.

6. The information processing device according to claim 1, wherein, in response to the read request, the memory controller reads data in the volatile memory, in a case where data corresponding to the read request is stored in the volatile memory, or reads data in a data area of the non-volatile memory and writes the read data into the volatile memory, in a case where the data corresponding to the read request is not stored in the volatile memory.

7. The information processing device according to claim 6, wherein, in response to the write request, the memory controller overwrites data of the volatile memory with the write data, in a case where data of an address of the write request is stored in the volatile memory, or reads data in a data area of the non-volatile memory and writes the read data to the volatile memory, and implements moreover overwriting with the write data, in a case where the data of an address of the write request is not stored in the volatile memory.

8. The information processing device according to claim 7, wherein the memory controller,

in processing of the write request, records a dirty bit in an entry in which overwriting with the write data is overwritten in the volatile memory, and

in processing of the read request and the write request, writes to an entry in which the dirty bit is not recorded, when data read from a data area of the non-volatile memory is written into the volatile memory.

9. The information processing device according to claim 1, wherein the memory controller and the processor are stored in a common package.

10. The information processing device according to claim 1, wherein the memory controller is formed in the processor.

11. A memory controller that processes a request from a processor included in an information processing device, the memory controller executes processes comprising:

the information processing includes a main memory that includes a non-volatile memory and a volatile memory that has access speed higher than the non-volatile memory, the volatile memory storing at least a part of data in a data area of the non-volatile memory, and the processor issues a read request, a write request and a snapshot request to data in the main memory,

reading, in response to the read request, data corresponding to the read request in the volatile memory,

writing, in response to the write request, write data to an area corresponding to the write request in the volatile memory and also writes a write history in a sequential manner to one of a plurality of entries of a log memory area in the non-volatile memory,

performing, in response to the snapshot request, snapshot processing of recording a mark bit having a first value in the entry in which the write history is written immediately before a time of the snapshot request,

performing, after the snapshot processing, data restoration processing of writing write data of the write history written in an entry or entries, up to the entry in which the mark bit having the first value is recorded, among the plurality of entries of the log memory area to a data area of the non-volatile memory, and changing the mark bit having the first value to a second value when the data restoration processing is completed, and

when an operation is resumed after the snapshot processing,

performing the data restoration processing if the mark bit having the first value is recorded in an entry of the log memory area, and changing the mark bit having the first value to the second value when the data restoration processing is completed, and

not performing the data restoration processing if the mark bit having the first value is not recorded in an entry of the log memory area.