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Apparatus and method for predicting a redundancy period

  • US 10,423,510 B2
  • Filed: 10/04/2017
  • Issued: 09/24/2019
  • Est. Priority Date: 10/04/2017
  • Status: Active Grant
First Claim
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1. An apparatus comprising:

  • a plurality of memory units organised as a hierarchical memory system, wherein each of at least some of said memory units is associated with a processor element;

    predictor circuitry to perform a prediction process to determine a predicted redundancy period of result data of a data processing operation to be performed, indicating a predicted point when said result data will be next accessed; and

    an operation controller to cause a selected processor element to perform said data processing operation, wherein said selected processor element is selected based on said predicted redundancy period,wherein said data processing operation is performed in response to execution of a given instruction from a series of instructions comprising a loop, and said prediction process is based on a processing period of one iteration of said loop.

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