Systems and methods for sharing resources having different data types

• US 10,423,733 B1
• Filed: 04/14/2016
• Issued: 09/24/2019
• Est. Priority Date: 12/03/2015
• Status: Active Grant

• Current Assignee: The MathWorks, Inc.
• Original Assignee: The MathWorks, Inc.
• Inventors: Venkataramani, Girish, Gu, Yongfeng, Kokku, Rama, Kuppannagari, Sanmukh Rao
• Primary Examiner(s): Chad, Aniss
• Application Number:
  US15/099,111
• Time in Patent Office: 1,258 Days
• CPC Class Codes: G06F 30/20 Design optimisation, verification or simulation optimisation, verification or simulation of circuit designs G06F30/30
• CPC Class Codes: G06F 30/30 Circuit design
• CPC Class Codes: G06F 30/331 with hardware acceleration, e.g. by using field programmable gate array [FPGA] or emulation
• CPC Class Codes: G06F 30/347 Physical level, e.g. placement or routing
• CPC Class Codes: G06F 8/30 Creation or generation of source code

Abstract

A system and method generates optimized code for a source model. The system may include a resource sharing optimizer that evaluates the source model and replaces multiple model elements of the source model that are functionally equivalent with a single shared model element. The model elements replaced with the single shared model element may have different fixed point data types. The resource sharing optimizer may convert some of the fixed point data types to a common fixed point data type.

Claims

1. A method comprising:

storing, in a memory, at least a portion of an executable source model having a plurality of model elements;

identifying, by a processor coupled to the memory, first and second model elements that implement a same computation, functionality, or operation with each other, where a first input to the first model element is associated with a first fixed point data type and a second input to the second model element is associated with a second fixed point data type that is different than the first fixed point data types;

modifying, by the processor, the at least a portion of the executable source model by

converting the first fixed point data type associated with the first input to the first model element to a new fixed point data type, wherein the converting includes at least one of;

changing a fraction length of at least one of the first fixed point data type or the second fixed point data type to a predetermined fraction length;

changing the first fixed point data type to either a signed data type or an unsigned data type;

promoting a first word length of the first fixed point data type to a second word length of the second fixed point data type;

partitioning the first model element into a set of model elements whose inputs are associated with data types having smaller word lengths than a word length of the first fixed point data type;

or

merging the first model element with one or more other model elements to create a merged model element wherein a merged word length associated with the merged model element equals the second word length of the second fixed point data type;

utilizing a single shared model element in place of the first and second model elements identified as implementing the same computation, functionality, or operation with each other; and

automatically generating code for the at least a portion of the executable source model, following the modifying, wherein the code generated for the at least a portion of the executable source model includes a portion for the single shared model element.

2. The method of claim 1 wherein the predetermined fraction length is a zero fraction length.

3. The method of claim 1 wherein the first fixed point data type associated with the first input to the first model element is signed, and the second fixed point data type associated with the second input to the second model element is unsigned.

4. The method of claim 3 wherein the converting includes converting the first fixed point data type associated with the first input to the first model element to unsigned.

5. The method of claim 4 wherein the converting further includes adding sign determination and setting logic to the at least a portion of the executable source model.

6. The method of claim 3 wherein the converting includes converting the second fixed point data type associated with the second input to the second model element to signed and increasing the second word length if the second fixed point data type.

7. The method of claim 1 wherein the second word length is larger than the first word length, the identifying includes identifying a third model element of the executable source model that implements the same computation, functionality, or operation as the first and second model elements, a third input to the third model element is associated with a third fixed point data type having a third word length equal to the first word length, the single shared model element is further utilized in place of the third model element, and the single shared model element corresponds to the second model element.

8. The method of claim 1 wherein the first fixed point data type associated with the first input to the first model element is signed, and the second fixed point data type associated with the second input to the second model element is unsigned, the method further comprising:

applying a heuristic to determine whether to use a normalize-to-signed conversion or a normalize-to-unsigned conversion.

9. The method of claim 8 further comprising:

receiving an indication of a target hardware device to implement the code, wherein the applying the heuristic includes evaluating hardware utilization information for the target hardware device.

10. The method of claim 1 further comprising:

generating one or more in-memory intermediate representations of the executable source model, wherein the identifying and the modifying are performed on the one or more in-memory intermediate representations.

11. The method of claim 1 wherein the first and second model elements are multipliers, gains, products, or adders.

12. The method of claim 1 wherein the executable source model is in the form of a block diagram or a hardware description.

13. An apparatus comprising:

a memory storing at least a portion of an executable source model, the at least a portion of the executable source model including model elements; and

a processor coupled to the memory, the processor configured to;

identify a group of the model elements that implement a same computation, functionality, or operation with each other, the group of the model elements having inputs associated with fixed point data types that are different; and

modify the at least a portion of the executable source model by

converting one or more of the fixed point data types that are associated with the inputs to the group of the model elements to a same fixed point data type, wherein the converting includes at least one of;

changing a fraction length of at least one of the fixed point data types to a predetermined fraction length;

changing the at least one of the fixed point data types to either a signed data type or an unsigned data type;

promoting a first word length of a first fixed point data type of the fixed point data types to a second word length of a second fixed point data type of the fixed point data types;

partitioning a first model element of the group of the model elements into a plurality of model elements whose inputs are associated with data types having smaller word lengths than a word length of the at least one of the fixed point data types;

or

merging a second model element of the group of the model elements with one or more other model elements to create a merged model element wherein a merged word length associated with the merged model element equals the first word length of the first fixed point data type,

replacing the group of the model elements with a single shared model element that implements the same computation, functionality, or operation as the group of the model elements, and

routing the inputs for the group of the model elements to the single shared model element.

14. The apparatus of claim 13 wherein the processor is further configured to:

automatically generate code for the at least a portion of the executable source model, following the modify.

15. The apparatus of claim 13 where the converting includes adding one or more data type conversion model elements at the inputs for one or more of the group of the model elements, the one or more data type conversion elements changing the fixed point data types associated with the inputs for the one or more of the group of the model elements.

16. The apparatus of claim 15 where the one or more data type conversion model elements change at least one of a word length, a fraction length, or a signedness associated with the inputs for the one or more of the group of the model elements.

17. The apparatus of claim 13 wherein the processor is further configured to:

generate a validation model where the validation model represents the at least a portion of the executable source model following the modify; and

present the validation model on a display coupled to the processor.

18. One or more non-transitory computer-readable media comprising program instructions, the program instructions, when executed, causing a processor to:

access, from a memory coupled to the processor, at least a portion of an executable source model, the at least a portion of the executable source model including model elements;

identify a group of the model elements that implement a same computation, functionality, or operation with each other, the group of the model elements having inputs associated with fixed point data types that are different; and

modify the at least a portion of the executable source model by

converting one or more of the fixed point data types that are associated with the inputs to the group of the model elements to a same fixed point data type wherein the converting includes at least one of;

changing a fraction length of at least one of the fixed point data types to a predetermined fraction length;

changing the at least one of the fixed point data types to either a signed data type or an unsigned data type;

promoting a first word length of a first fixed point data type of the fixed point data types to a second word length of a second fixed point data type of the fixed point data types;

partitioning a first model element of the group of the model elements into a plurality of model elements whose inputs are associated with data types having smaller word lengths than a word length of the at least one of the fixed point data types;

or

merging a second model element of the group of the model elements with one or more other model elements to create a merged model element wherein a merged word length associated with the merged model element equals the first word length of the first fixed point data type,

replacing the group of the model elements with a single shared model element that implements the same computation, functionality, or operation as the group of the model elements, and

routing the inputs for the group of the model elements to the single shared model element.

19. The one or more non-transitory, computer-readable media of claim 18 further comprising instructions to:

automatically generate code for the at least a portion of the executable source model, following the modify.