Manufacturing method of OLED backplane

• US 10,424,628 B2
• Filed: 06/29/2018
• Issued: 09/24/2019
• Est. Priority Date: 01/09/2018
• Status: Expired due to Fees

• Current Assignee: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. (TCL Technology Group Corp.)
• Original Assignee: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. (TCL Technology Group Corp.)
• Inventors: Yu, MingJiue
• Primary Examiner(s): Dang, Phuc T
• Application Number:
  US16/023,462
• Publication Number:
  US 20190214445A1
• Time in Patent Office: 452 Days
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H10K 59/1201 Manufacture or treatment
• CPC Class Codes: H10K 59/1213 the pixel elements being TFTs
• CPC Class Codes: H10K 59/1216 the pixel elements being capacitors
• CPC Class Codes: H10K 59/122 Pixel-defining structures or layers, e.g. banks
• CPC Class Codes: H10K 59/124 Insulating layers formed between TFT elements and OLED elements
• CPC Class Codes: H10K 71/00 Manufacture or treatment specially adapted for the organic devices covered by this subclass
• CPC Class Codes: H10K 71/20 Changing the shape of the active layer in the devices, e.g. patterning

Abstract

The invention provides an OLED backplane manufacturing method, comprising: depositing a buffer layer on a glass substrate; depositing a first metal layer on the buffer layer, patterning the first metal layer to form a source, a drain and a lower electrode of storage capacitor; depositing a semiconductor layer on the buffer layer, and the semiconductor layer covering the source and the drain; depositing a gate insulating layer on the semiconductor layer; depositing a second metal layer on the gate insulating layer, patterning the second metal layer to obtain a gate and an upper electrode of storage capacitor; using the gate self-aligned to etch the gate insulating layer and the semiconductor layer to expose the source and the drain. The invention educes the number of masks required for OLED backplane manufacturing and effectively reduces the production cost of OLED backplane.

Claims

1. A manufacturing method of organic light-emitting diode (OLED) backplane, comprising:

depositing a buffer layer on a glass substrate;

depositing a first metal layer on the buffer layer, patterning the first metal layer to form a source, a drain and a lower electrode of storage capacitor;

depositing a semiconductor layer on the buffer layer, and the semiconductor layer covering the source and the drain;

depositing a gate insulating layer on the semiconductor layer;

depositing a second metal layer on the gate insulating layer, patterning the second metal layer to obtain a gate and an upper electrode of storage capacitor;

using the gate self-aligned to etch the gate insulating layer and the semiconductor layer to expose the source and the drain.

2. The manufacturing method of OLED backplane as claimed in claim 1, further comprising:

forming a passivation layer on the buffer layer, the passivation layer covering the source, the drain, the gate, the upper electrode of storage capacitor, and the lower electrode of storage capacitor.

3. The manufacturing method of OLED backplane as claimed in claim 2, further comprising:

forming a planarization layer on the passivation layer;

forming via holes on the planarization layer and the passivation layer, also forming an indium-tin-oxide (ITO) electrode on the planarization layer, wherein the via hole on the planarization layer aligned with the via hole on the passivation layer and above the drain, the ITO electrode being electrically connected to the drain through the via hole on the planarization layer and the via hole on the passivation layer.

4. The manufacturing method of OLED backplane as claimed in claim 3, further comprising:

forming a pixel definition layer on the planarization layer, and the pixel definition layer covering the ITO electrode;

patterning the pixel definition layer to at least partially expose the ITO electrode.

5. The manufacturing method of OLED backplane as claimed in claim 1, wherein the buffer layer is at least an SiOx layer and/or at least an SiNx layer;

and the buffer layer has a thickness of 1000-5000 Å

.

6. The manufacturing method of OLED backplane as claimed in claim 1, wherein the gate insulating layer is at least an SiOx layer and/or at least an SiNx layer;

and the gate insulating layer has a thickness of 1000-3000 Å

.

7. The manufacturing method of OLED backplane as claimed in claim 1, wherein the first metal layer and the second metal layer are made of ones of the following:

Mo, Al, Cu, Ti, Mo alloys, Al alloys, Cu alloys, and Ti alloys;

the semiconductor layer is made of metal-oxide-semiconductor material, and the metal-oxide-semiconductor material is one of the following;

IGZO, ITZO, and IGZTO.

8. A manufacturing method of organic light-emitting diode (OLED) backplane, comprising:

depositing a buffer layer on a glass substrate;

depositing a first metal layer on the buffer layer, patterning the first metal layer to form a source, a drain and a lower electrode of storage capacitor;

depositing a semiconductor layer on the buffer layer, and the semiconductor layer covering the source and the drain;

depositing a gate insulating layer on the semiconductor layer;

depositing a second metal layer on the gate insulating layer, patterning the second metal layer to obtain a gate and an upper electrode of storage capacitor;

using the gate self-aligned to etch the gate insulating layer and the semiconductor layer to expose the source and the drain;

wherein the buffer layer is at least an SiOx layer and/or at least an SiNx layer;

and the buffer layer has a thickness of 1000-5000 Å

.

9. The manufacturing method of OLED backplane as claimed in claim 8, further comprising:

Ruining a passivation layer on the buffer layer, the passivation layer covering the source, the drain, the gate, the upper electrode of storage capacitor, and the lower electrode of storage capacitor.

10. The manufacturing method of OLED backplane as claimed in claim 9, further comprising:

forming a planarization layer on the passivation layer;

forming via holes on the planarization layer and the passivation layer, also forming an indium-tin-oxide (ITO) electrode on the planarization layer, wherein the via hole on the planarization layer aligned with the via hole on the passivation layer and above the drain, the ITO electrode being electrically connected to the drain through the via hole on the planarization layer and the via hole on the passivation layer.

11. The manufacturing method of OLED backplane as claimed in claim 10, further comprising:

forming a pixel definition layer on the planarization layer, and the pixel definition layer covering the ITO electrode;

patterning the pixel definition layer to at least partially expose the ITO electrode.

12. The manufacturing method of OLED backplane as claimed in claim 8, wherein the gate insulating layer is at least an SiOx layer and/or at least an SiNx layer;

and the gate insulating layer has a thickness of 1000-3000 Å

.

13. The manufacturing method of OLED backplane as claimed in claim 8, wherein the first metal layer and the second metal layer are made of ones of the following:

Mo, Al, Cu, Ti, Mo alloys, Al alloys, Cu alloys, and Ti alloys;

the semiconductor layer is made of metal-oxide-semiconductor material, and the metal-oxide-semiconductor material is one of the following;

IGZO, ITZO, and IGZTO.