Photodetector comprising a single photon avalanche diode and a capacitor

• US 10,424,683 B1
• Filed: 10/31/2018
• Issued: 09/24/2019
• Est. Priority Date: 05/17/2018
• Status: Active Grant

• Current Assignee: Hi LLC (Cybin, Inc.)
• Original Assignee: Hi LLC (Cybin, Inc.)
• Inventors: Do Valle, Bruno, Jin, Rong, Dahle, Jacob, Katnani, Husam
• Primary Examiner(s): Le, Que Tan
• Application Number:
  US16/177,351
• Time in Patent Office: 328 Days
• Field of Search: 250214 R
• CPC Class Codes: A61B 5/0002 Remote monitoring of patients using telemetry, e.g. transmission of vital signals via a communication network A61B5/07 takes precedence; transmission systems for measured values G08C; transmission H04B; transmission of digital information H04L; wireless communication networks H04W
• CPC Class Codes: A61B 5/0059 using light, e.g. diagnosis by transillumination, diascopy, fluorescence A61B5/0093, A61B5/1455, A61B5/02416 and A61B5/0261 take precedence
• CPC Class Codes: A61B 5/24 Detecting, measuring or recording bioelectric or biomagnetic signals of the body or parts thereof
• CPC Class Codes: A61B 5/369 Electroencephalography [EEG] devices for psychotechnics A61B5/16
• CPC Class Codes: A61B 5/40 Detecting, measuring or recording for evaluating the nervous system A61B5/4806, A61B5/4821, A61B5/4824 take precedence
• CPC Class Codes: A61B 5/6803 Head-worn items, e.g. helmets, masks, headphones or goggles
• CPC Class Codes: A61M 2230/10 Electroencephalographic signals
• CPC Class Codes: G01J 1/44 Electric circuits for command of an exposure part G03B7/02
• CPC Class Codes: G01J 2001/4466 Avalanche
• CPC Class Codes: G01S 17/18 wherein range gates are used
• CPC Class Codes: G01S 7/4861 Circuits for detection, sampling, integration or read-out
• CPC Class Codes: G01S 7/4863 Detector arrays, e.g. charge-transfer gates
• CPC Class Codes: H01L 31/022408 for devices characterised by at least one potential jump barrier or surface barrier
• CPC Class Codes: H01L 31/035272 characterised by at least one potential jump barrier or surface barrier
• CPC Class Codes: H01L 31/107 the potential barrier working in avalanche mode, e.g. avalanche photodiodes
• CPC Class Codes: H04N 25/70 SSIS architectures; Circuits associated therewith

Abstract

An exemplary photodetector includes a SPAD and a capacitor. The capacitor is configured to be charged, while the SPAD is in a disarmed state, with a bias voltage by a voltage source. The capacitor is further configured to supply, when the SPAD is put in an armed state, the bias voltage to an output node of the SPAD such that a voltage across the SPAD is greater than a breakdown voltage of the SPAD.

Claims

1. A photodetector comprising:

a single photon avalanche diode (SPAD); and

a capacitor configured to

be charged, while the SPAD is in a disarmed state, with a bias voltage by a voltage source, and

supply, when the SPAD is put in an armed state, the bias voltage to an output node of the SPAD such that a voltage across the SPAD is greater than a breakdown voltage of the SPAD.

2. The photodetector of claim 1, wherein the capacitor supplies the bias voltage to the output node of the SPAD while the capacitor is disconnected from the voltage source.

3. The photodetector of claim 1, further comprising:

an additional voltage source connected to an input node of the SPAD and configured to supply a reverse bias voltage at the input node, the reverse bias voltage having a magnitude that is equal to or less than the breakdown voltage of the SPAD, wherein the voltage source is configured to selectively connect to the capacitor to charge the capacitor with the bias voltage, the bias voltage being an excess bias voltage that has a magnitude that is less than the magnitude of the reverse bias voltage supplied by the additional voltage source; and

a switch configuration configured to put the SPAD into the armed state by connecting the capacitor to an output node of the SPAD while the capacitor is charged with the excess bias voltage and while the capacitor is disconnected from the voltage source;

wherein, when the capacitor is connected to the output node of the SPAD, the capacitor supplies the excess bias voltage to the output node of the SPAD such that a voltage across the SPAD is greater than the breakdown voltage.

4. The photodetector of claim 3, wherein the switch configuration is further configured to put the SPAD into the disarmed state by disconnecting the capacitor from the output node of the SPAD and connecting the output node of the SPAD to ground.

5. The photodetector of claim 4, wherein the switch configuration comprises:

a first switch configured to selectively

close to connect the output node of the SPAD to the capacitor, and

open to disconnect the output node of the SPAD from the capacitor; and

a second switch configured to selectively

close to connect the output node of the SPAD to ground, and

open to disconnect the output node of the SPAD from ground.

6. The photodetector of claim 5, wherein the switch configuration further comprises:

a third switch configured to selectively

close to connect the voltage source to the capacitor to charge the capacitor with the excess bias voltage, and

open to disconnect the voltage source from the capacitor in response to the capacitor being charged with the excess bias voltage.

7. The photodetector of claim 6, further comprising a control circuit configured to control the switch configuration, wherein the control circuit is configured to cause the capacitor to be charged with the excess bias voltage while the SPAD is in the disarmed state by:

opening the first switch to disconnect the output node of the SPAD from the capacitor;

closing the second switch to connect the output node of the SPAD to ground; and

closing the third switch to connect the voltage source to the capacitor.

8. The photodetector of claim 7, wherein the control circuit is further configured to open the third switch, while the first switch is still open and the second switch is still closed, to disconnect the voltage source from the capacitor in response to the capacitor being charged with the excess bias voltage.

9. The photodetector of claim 8, wherein the control circuit is further configured to put the SPAD in the armed state while the capacitor is charged with the excess bias voltage by:

closing the first switch to connect the output node of the SPAD to the capacitor;

opening the second switch to disconnect the output node of the SPAD from ground; and

keeping the third switch open to keep the voltage source disconnected from the capacitor.

10. The photodetector of claim 9, wherein the control circuit is further configured to:

maintain data representative of a programmable gate delay;

detect an occurrence of a light pulse while the SPAD is in the disarmed state; and

put the SPAD in the armed state a predetermined amount of time, as specified by the programmable gate delay, after the occurrence of the light pulse.

11. The photodetector of claim 10, wherein the control circuit is further configured to:

maintain data representative of a programmable gate width; and

put the SPAD in the disarmed state a predetermined amount of time, as specified by the programmable gate width, after the SPAD is put into the armed state by opening the first switch to disconnect the output node of the SPAD from the capacitor, and

closing the second switch to connect the output node of the SPAD to ground.

12. The photodetector of claim 10, further comprising an inverter connected to the output node of the SPAD, wherein the inverter generates an output pulse when a voltage on the output node drops below a certain value in response to an avalanche occurring within the SPAD, the avalanche occurring in response to a photon from the light pulse hitting the SPAD while the SPAD is in the armed state.

13. The photodetector of claim 12, further comprising:

a time-to-digital converter connected to an output of the inverter and configured to output data representative of a time difference between an occurrence of the output pulse and the occurrence of the light pulse; and

a signal processing circuit connected to an output of the time-to-digital converter and configured to perform an operation on the data output by the time-to-digital converter.

14. The photodetector of claim 3, further comprising a resistor that has a first node connected to the output node of the SPAD and a second node, wherein the switch configuration connects the capacitor to the output node of the SPAD by connecting the capacitor to the second node of the resistor.

15. The photodetector of claim 1, wherein

the capacitor is connected to an output node of the SPAD;

the voltage source is configured to selectively connect to the capacitor to charge the capacitor with the bias voltage, the bias voltage having a magnitude that is equal to or less than a breakdown voltage of the SPAD; and

the photodetector further comprises;

an additional voltage source configured to supply a reverse excess bias voltage having a magnitude that is less than the magnitude of the bias voltage; and

a switch configuration configured to put the SPAD into the armed state by connecting the additional voltage source to an input node of the SPAD while the capacitor is both charged with the bias voltage and disconnected from the voltage source.

16. The photodetector of claim 15, wherein the switch configuration is further configured to put the SPAD into the disarmed state by disconnecting the additional voltage source from the input node of the SPAD and connecting the input node of the SPAD to ground.

17. The photodetector of claim 16, wherein the switch configuration comprises a first switch configured to selectively

be in a first position to connect the input node of the SPAD to ground;

and

be in a second position to connect the input node of the SPAD to the additional voltage source.

18. The photodetector of claim 17, wherein the switch configuration further comprises a second switch configured to selectively

be in a first position to connect the voltage source to the capacitor;

and

be in a second position to disconnect the voltage source from the capacitor.

19. The photodetector of claim 18, further comprising a control circuit configured to control the switch configuration, wherein the control circuit is configured to cause the capacitor to be charged with the bias voltage while the SPAD is in the disarmed state by:

causing the first switch to be in the first position to connect the input node of the SPAD to ground; and

causing the second switch to be in the first position to connect the voltage source to the capacitor.

20. The photodetector of claim 19, wherein the control circuit is further configured to cause the second switch to be in the second position, while the first switch is still in the first position, to disconnect the voltage source from the capacitor in response to the capacitor being charged with the bias voltage.

21. The photodetector of claim 20, wherein the control circuit is further configured to put the SPAD in the armed state while the capacitor is charged with the bias voltage by:

causing the first switch to be in the second position to connect the input node of the SPAD to the additional voltage source; and

keeping the second switch in the second position to keep the voltage source disconnected from the capacitor.

22. The photodetector of claim 21, wherein the control circuit is further configured to:

maintain data representative of a programmable gate delay;

detect an occurrence of a light pulse while the SPAD is in the disarmed state; and

put the SPAD in the armed state a predetermined amount of time, as specified by the programmable gate delay, after the occurrence of the light pulse.

23. The photodetector of claim 22, wherein the control circuit is further configured to:

maintain data representative of a programmable gate width; and

put the SPAD in the disarmed state a predetermined amount of time, as specified by the programmable gate width, after the SPAD is put into the armed state by causing the first switch to be in the first position to connect the input node of the SPAD to ground.

24. The photodetector of claim 22, further comprising an inverter connected to the output node of the SPAD, wherein the inverter generates an output pulse when a voltage on the output node drops below a certain value in response to an avalanche occurring within the SPAD, the avalanche occurring in response to a photon from the light pulse hitting the SPAD while the SPAD is in the armed state.

25. The photodetector of claim 24, further comprising:

a time-to-digital converter connected to an output of the inverter and configured to output data representative of a time difference between the occurrence of the output pulse and the occurrence of the light pulse; and

a signal processing circuit connected to an output of the time-to-digital converter and configured to perform an operation on the data output by the time-to-digital converter.

26. The photodetector of claim 1, wherein the SPAD and capacitor are housed in a non-invasive wearable device for use by a user.

27. The photodetector of claim 26, wherein:

the non-invasive wearable device further houses a light source configured to generate a light pulse; and

the SPAD is configured to detect a photon of the light pulse after the photon reflects from a target internal to the user.

28. A method comprising:

charging a capacitor connected to a single photon avalanche diode (SPAD) with a bias voltage while the SPAD is in a disarmed state; and

using the capacitor to supply, when the SPAD is put in an armed state, the bias voltage to an output node of the SPAD such that a voltage across the SPAD is greater than a breakdown voltage of the SPAD.

29. The method of claim 28, wherein the supplying of the bias voltage to the output node of the SPAD is performed while the capacitor is disconnected from the voltage source.

30. The method of claim 28, further comprising housing the SPAD and the capacitor in a non-invasive wearable device for use by a user.