Hydrogenation and nitridization processes for modifying effective oxide thickness of a film

• US 10,431,466 B2
• Filed: 10/12/2018
• Issued: 10/01/2019
• Est. Priority Date: 06/20/2016
• Status: Active Grant

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Swenberg, Johanes S., Liu, Wei, Graoui, Houda, Hung, Steven C. H.
• Primary Examiner(s): Chang, Jay C
• Assistant Examiner(s): Liu, Mikka
• Application Number:
  US16/159,461
• Publication Number:
  US 20190115219A1
• Time in Patent Office: 354 Days
• CPC Class Codes: H01L 21/02186 the material containing titanium, e.g. TiO2
• CPC Class Codes: H01L 21/0234 treatment by exposure to a plasma
• CPC Class Codes: H01L 21/28255 the insulator being formed after the semiconductor body, the semiconductor belonging to Group IV and not being elemental silicon, e.g. Ge, SiGe, SiGeC
• CPC Class Codes: H01L 21/28512 on semiconductor bodies comprising elements of Group IV of the Periodic Table
• CPC Class Codes: H01L 21/28518 the conductive layers comprising silicides H01L21/28537 takes precedence
• CPC Class Codes: H01L 21/28575 on semiconductor bodies comprising AIIIBV compounds
• CPC Class Codes: H01L 21/3212 by chemical mechanical polishing [CMP]
• CPC Class Codes: H01L 21/324 Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering H01L21/20 - H01L21/288 and H01L21/302 - H01L21/322 take precedence
• CPC Class Codes: H01L 21/76843 formed in openings in a dielectric
• CPC Class Codes: H01L 21/76855 After-treatment introducing at least one additional element into the layer
• CPC Class Codes: H01L 21/76856 by treatment in plasmas or gaseous environments, e.g. nitriding a refractory metal liner
• CPC Class Codes: H01L 21/76862 Bombardment with particles, e.g. treatment in noble gas plasmas; UV irradiation
• CPC Class Codes: H01L 29/401 Multistep manufacturing processes
• CPC Class Codes: H01L 29/45 Ohmic electrodes
• CPC Class Codes: H01L 29/452 on AIII-BV compounds

Abstract

Embodiments described herein generally relate to enable the formation of a metal gate structure with a reduced effective oxide thickness over a similar structure formed via conventional methods. A plasma hydrogenation process followed by a plasma nitridization process is performed on a metal nitride layer in a film stack, thereby removing oxygen atoms disposed within layers of the film stack and, in some embodiments eliminating an oxygen-containing interfacial layer disposed within the film stack. As a result, an effective oxide thickness of the metal gate structure is reduced with little or no accompanying flatband voltage shift. Further, the metal gate structure operates with an increased leakage current that is as little as one quarter the increase in leakage current associated with a similar metal gate structure formed via conventional techniques.

Claims

1. A method of forming a structure in a semiconductor device, the method comprising:

depositing a metal nitride layer on a high-k dielectric layer formed on a semiconductor substrate to form a portion of the structure, wherein the semiconductor substrate is disposed over a substrate supporting surface of a pedestal disposed in a first processing chamber in a cluster tool;

sequentially exposing an exposed surface of the deposited metal nitride layer formed on the semiconductor substrate to a non-oxidizing plasma-excited hydrogen species followed by a plasma-excited nitrogen species while a bias is applied to the semiconductor substrate, which is disposed over a substrate supporting surface of a pedestal disposed in a second processing chamber in the cluster tool;

depositing a silicon-containing layer on the exposed surface;

performing a thermal anneal process on the silicon-containing layer; and

removing the silicon-containing layer.

2. The method of claim 1, further comprising:

depositing a metal layer on the exposed surface of the metal nitride layer after sequentially exposing the exposed surface to the non-oxidizing plasma-excited hydrogen species and the plasma-excited nitrogen species.

3. The method of claim 2, wherein the structure comprises a p-metal gate structure and the metal layer comprises a work-function metal of the p-metal gate structure.

4. The method of claim 1, further comprising, prior to depositing the high-k dielectric layer, forming a silicon-dioxide containing interface layer on which the high-k dielectric layer is subsequently formed.

5. The method of claim 1, wherein the exposed surface is not exposed to air after being exposed to the non-oxidizing plasma-excited hydrogen species and before being exposed to the plasma-excited nitrogen species.

6. A method of forming a structure in a semiconductor device, the method comprising:

depositing a sacrificial metal nitride layer on a high-k dielectric layer formed on a semiconductor substrate;

depositing a silicon-containing layer on the sacrificial metal nitride layer;

performing a thermal anneal process on the sacrificial metal nitride layer and the silicon-containing layer;

removing the sacrificial metal nitride layer and the silicon-containing layer;

depositing a metal nitride layer on the high-k dielectric layer to form a portion of the structure, wherein the semiconductor substrate is disposed over a substrate supporting surface of a pedestal disposed in a first processing chamber in a cluster tool; and

sequentially exposing an exposed surface of the deposited metal nitride layer formed on the semiconductor substrate to a non-oxidizing plasma-excited hydrogen species followed by a plasma-excited nitrogen species while a bias is applied to the semiconductor substrate, which is disposed over a substrate supporting surface of a pedestal disposed in a second processing chamber in the cluster tool.

7. The method of claim 6, further comprising, prior to depositing the high-k dielectric layer, forming a silicon-dioxide containing interface layer on which the high-k dielectric layer is subsequently formed.

8. The method of claim 6, wherein the exposed surface is not exposed to air after being exposed to the non-oxidizing plasma-excited hydrogen species and before being exposed to the plasma-excited nitrogen species.

9. A method of forming a structure in a semiconductor device, the method comprising:

exposing a surface of a second process chamber to an oxygen-free plasma;

depositing a metal nitride layer on a high-k dielectric layer formed on a semiconductor substrate to form a portion of the structure, wherein the semiconductor substrate is disposed over a substrate supporting surface of a pedestal disposed in a first processing chamber in a cluster tool; and

sequentially exposing an exposed surface of the deposited metal nitride layer formed on the semiconductor substrate to a non-oxidizing plasma-excited hydrogen species followed by a plasma-excited nitrogen species while a bias is applied to the semiconductor substrate, which is disposed over a substrate supporting surface of a pedestal disposed in the second processing chamber in the cluster tool.

10. The method of claim 9, wherein the oxygen-free plasma is formed within the second process chamber when the semiconductor substrate is not disposed within the second process chamber.

11. The method of claim 9, further comprising, after sequentially exposing the exposed surface of the metal nitride layer to the non-oxidizing plasma-excited hydrogen species followed by the plasma-excited nitrogen species, exposing the exposed surface to air.

12. The method of claim 9, wherein the exposed surface is not exposed to air after being exposed to the non-oxidizing plasma-excited hydrogen species and before being exposed to the plasma-excited nitrogen species.

13. A method of forming a structure in a semiconductor device, the method comprising:

depositing a high-k dielectric layer on a semiconductor substrate, wherein the semiconductor substrate is disposed over a pedestal;

depositing a metal nitride layer on the high-k dielectric layer;

sequentially exposing an exposed surface of the metal nitride layer to a non-oxidizing plasma-excited hydrogen species followed by a plasma-excited nitrogen species, while a bias is applied to the pedestal;

exposing the exposed surface to air after sequentially exposing the exposed surface to the non-oxidizing plasma-excited hydrogen species followed by the plasma-excited nitrogen species; and

annealing the high-k dielectric layer and the metal nitride layer after exposing the exposed surface to air.

14. The method of claim 13, after annealing the high-k dielectric layer and the metal nitride layer, depositing a metal layer on the exposed surface of the metal nitride layer.

15. The method of claim 13, wherein the non-oxidizing plasma-excited hydrogen species are generated from a process gas, the process gas comprising hydrogen gas (H₂).

16. The method of claim 13, wherein the metal nitride layer has a thickness that is less than a diffusion length of oxygen in the metal nitride layer when the metal nitride layer undergoes the annealing.

17. A method of forming a structure in a semiconductor device, the method comprising:

depositing a high-k dielectric layer on a semiconductor substrate, wherein the semiconductor substrate is disposed over a pedestal;

depositing a metal nitride layer on the high-k dielectric layer to form a portion of the structure while a bias is applied to the pedestal; and

reducing a first effective oxide thickness of the metal nitride layer to a second effective oxide thickness by sequentially exposing an exposed surface of the metal nitride layer to a non-oxidizing plasma-excited hydrogen species followed by a plasma-excited nitrogen species, wherein the non-oxidizing plasma-excited hydrogen species are generated from a first process gas, the first process gas comprising hydrogen gas (H₂), and wherein the plasma-excited nitrogen species are generated from a second process gas, the second process gas comprising nitrogen gas (N₂) and ammonia (NH₃).

18. The method of claim 17, wherein the exposed surface is not exposed to air after being exposed to the non-oxidizing plasma-excited hydrogen species and before being exposed to the plasma-excited nitrogen species.

19. A method of forming a structure in a semiconductor device, the method comprising:

performing an oxygen-free plasma treatment process on a process chamber in which an exposed surface of the process chamber is exposed to a non-oxidizing plasma-excited hydrogen species;

depositing a high-k dielectric layer on a semiconductor substrate, wherein the semiconductor substrate is disposed over a pedestal;

depositing a metal nitride layer on the high-k dielectric layer to form a portion of the structure while a bias is applied to the pedestal, the pedestal disposed in the process chamber; and

reducing a first effective oxide thickness of the metal nitride layer to a second effective oxide thickness by sequentially exposing an exposed surface of the metal nitride layer to the non-oxidizing plasma-excited hydrogen species followed by a plasma-excited nitrogen species.

20. The method of claim 19, wherein the oxygen-free plasma treatment process is performed on the process chamber when the semiconductor substrate is not disposed within the process chamber.