Semiconductor device
First Claim
1. A semiconductor device comprising:
- a semiconductor layer of SiC which includes an active portion;
a plurality of MIS transistors which are formed at the active portion, the active portion partitioned into the plurality of MIS transistors by a plurality of gate trenches, and each of the MIS transistors having a first conductive-type source region, a second conductive-type channel region, and a first conductive-type drain region sequentially along a side surface of the gate trench;
a plurality of first gate finger trenches which are arranged by extended portions of the gate trenches at a gate finger portion;
a gate electrode embedded in each of the gate trenches and the first gate finger trenches via a gate insulating film;
a second conductive-type first bottom-portion impurity region which is formed at least at a bottom portion of the first gate finger trenches;
a gate finger which is electrically connected to the first gate finger trenches and the gate electrode;
a source electrode formed over the semiconductor layer;
a conductive film between the source electrode and the semiconductor layer, having a second insulating film between the conductive film and the semiconductor layer, the conductive film being present only on the second insulating film, the source electrode being in direct contact with a second conductive-type channel contact region in the semiconductor layer, and the conductive film being between two adjacent gate trenches;
and;
a second conductive-type electric field relaxation region which is formed more deeply than a bottom portion of the first gate finger trench.
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Accused Products
Abstract
The semiconductor device of the present invention includes a semiconductor layer which includes an active portion and a gate finger portion, an MIS transistor which is formed at the active portion and includes a gate trench as well as a source region, a channel region and a drain region sequentially along a side surface of the gate trench, a plurality of first gate finger trenches arranged by an extended portion of the gate trench at the gate finger portion, a gate electrode embedded each in the gate trench and the first gate finger trench, a second conductive-type first bottom-portion impurity region formed at least at a bottom portion of the first gate finger trench, a gate finger which crosses the plurality of first gate finger trenches and is electrically connected to the gate electrode, and a second conductive-type electric field relaxation region which is formed more deeply than the bottom portion of the first gate finger trench between the mutually adjacent first gate finger trenches.
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Citations
19 Claims
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1. A semiconductor device comprising:
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a semiconductor layer of SiC which includes an active portion; a plurality of MIS transistors which are formed at the active portion, the active portion partitioned into the plurality of MIS transistors by a plurality of gate trenches, and each of the MIS transistors having a first conductive-type source region, a second conductive-type channel region, and a first conductive-type drain region sequentially along a side surface of the gate trench; a plurality of first gate finger trenches which are arranged by extended portions of the gate trenches at a gate finger portion; a gate electrode embedded in each of the gate trenches and the first gate finger trenches via a gate insulating film; a second conductive-type first bottom-portion impurity region which is formed at least at a bottom portion of the first gate finger trenches; a gate finger which is electrically connected to the first gate finger trenches and the gate electrode; a source electrode formed over the semiconductor layer; a conductive film between the source electrode and the semiconductor layer, having a second insulating film between the conductive film and the semiconductor layer, the conductive film being present only on the second insulating film, the source electrode being in direct contact with a second conductive-type channel contact region in the semiconductor layer, and the conductive film being between two adjacent gate trenches; and; a second conductive-type electric field relaxation region which is formed more deeply than a bottom portion of the first gate finger trench. - View Dependent Claims (2, 3, 4, 5, 6, 7, 12, 13, 14, 15, 16, 17, 18, 19)
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8. A semiconductor device comprising:
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a semiconductor layer which includes an active portion and a gate finger portion; a plurality of MIS transistors which are formed at the active portion, the active portion partitioned into the plurality of MIS transistors by a plurality of gate trenches formed at a predetermined pitch P1, each of the MIS transistors having a first conductive-type source region, a second conductive-type channel region, and a first conductive-type drain region sequentially along a side surface of the gate trench; a plurality of gate finger trenches which are formed in the gate finger portion at a pitch P2 narrower than the pitch P1 of the gate trenches and being integral with the gate trenches; a gate electrode embedded each in the gate trench and the gate finger trench via a gate insulating film; a second conductive-type bottom-portion impurity region which is formed at least at a bottom portion of the gate finger trench; and a gate finger which crosses the plurality of gate finger trenches and is electrically connected to the gate electrode. - View Dependent Claims (9, 10, 11)
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Specification