Methods and apparatus for enabling and disabling scrambling of control symbols

• US 10,432,435 B2
• Filed: 05/21/2018
• Issued: 10/01/2019
• Est. Priority Date: 01/31/2013
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Whitby-Strevens, Colin
• Primary Examiner(s): Yu, Lihong
• Application Number:
  US15/985,516
• Publication Number:
  US 20180375695A1
• Time in Patent Office: 498 Days
• Field of Search: 375257
• CPC Class Codes: G09G 2330/06 Handling electromagnetic interferences [EMI], covering emitted as well as received electromagnetic radiation
• CPC Class Codes: G09G 2370/12 Use of DVI or HDMI protocol in interfaces along the display data pipeline
• CPC Class Codes: G09G 5/006 Details of the interface to the display terminal specific for a display terminal using a CRT G09G1/167; using a flat panel G09G3/2096; circuits for interfacing with colour displays G09G5/04
• CPC Class Codes: H04L 25/03866 using scrambling
• CPC Class Codes: H04L 25/08 Modifications for reducing interference; Modifications for reducing effects due to line faults ; Receiver end arrangements for detecting or overcoming line faults
• CPC Class Codes: H04N 21/43635 HDMI

Abstract

Methods and apparatus for the selection and/or configuration of scrambling operations to accommodate e.g., both scrambling and non-scrambling connections (such as to e.g., legacy type devices). In one embodiment, media interface devices (such as e.g., HDMI (High-Definition Multimedia Interface)) devices may provide enhanced scrambling capabilities; solutions disclosed herein provide, among other things, support for both enhanced scrambling capable devices and legacy devices, and enable a device to determine the scrambling capabilities of a connected device.

Claims

1. A sink device comprising:

an audio-visual interface in data communication with a source device, the audio-visual interface configured to receive a clock signal at either a first amplitude or a second amplitude that is lower than the first amplitude;

a register accessible via the audio-visual interface wherein one or more contents of the register are configured to identify one or more supported scrambling capabilities for the sink device;

logic configured to recover the clock signal having the second amplitude when the source device enables a scrambling functionality of the one or more supported scrambling capabilities; and

logic configured to recover the clock signal having the first amplitude when the scrambling functionality of the one or more supported scrambling capabilities are not enabled.

2. The sink device of claim 1, wherein the clock signal does not exceed a first data rate when the scrambling functionality of the one or more supported scrambling capabilities are not enabled.

3. The sink device of claim 2, wherein the clock signal exceeds the first data rate when the scrambling functionality of the one or more supported scrambling capabilities are enabled.

4. The sink device of claim 1, further comprising a second register accessible via the audio-visual interface, wherein one or more contents of the second register are configured to identify when the one or more supported scrambling capabilities are enabled.

5. The sink device of claim 1, further comprising a second register accessible via the audio-visual interface, wherein one or more contents of the second register causes a selection of the scrambling functionality from the one or more supported scrambling capabilities.

6. The sink device of claim 1, wherein the scrambling functionality is configured to reduce electro-magnetic interference (EMI) characteristics of the clock signal.

7. The sink device of claim 1, wherein the one or more scrambling parameters comprise one or more of (i) a scrambling capability supported by the sink device and (ii) a duration of scrambling configured to be performed by the sink device.

8. A computerized apparatus comprising:

a data interface configured to be in data communication with a source device and a processor apparatus; and

a non-transitory computer-readable apparatus comprising a storage medium, the storage medium having a computer program stored thereon, the computer program comprising a plurality of instructions that are configured to, when executed by the processor apparatus, cause the processor apparatus to;

evaluate whether a scrambling functionality may be enabled on the source device;

in response to a determination that the scrambling functionality may not be enabled, cause transmission of a clock signal over the network interface at an amplitude associated with legacy operation; and

in response to a determination that the scrambling functionality may be enabled, negotiate a scrambling parameter with the source device, and cause transmission of the clock signal over the network interface at a reduced amplitude relative to the amplitude associated with the legacy operation.

9. The computerized apparatus of claim 8, wherein the plurality of instructions are further configured to, when executed by the processor apparatus, cause the processor apparatus to:

enable scrambling on the computerized apparatus in response to the determination that the scrambling functionality may be enabled on the source device.

10. The computerized apparatus of claim 8, wherein the transmission of the clock signal at the reduced amplitude comprises a transmission of the clock signal so as to reduce an electro-magnetic interference (EMI) characteristic of the clock signal via the scrambling functionality.

11. The computerized apparatus of claim 8, wherein the plurality of instructions are further configured to, when executed by the processor apparatus, cause the processor apparatus to:

subsequent to the evaluation of whether the scrambling functionality on the computerized apparatus may be enabled, reevaluate whether the scrambling functionality on the computerized apparatus may be enabled based on detection of a change in an operating mode.

12. The computerized apparatus of claim 8, wherein the plurality of instructions are further configured to, when executed by the processor apparatus, cause the processor apparatus to:

in response to the determination that the scrambling functionality may be enabled, enable scrambling in periodic intervals, allow determination of whether the scrambling is enabled based on a rate of receipt of unscrambled characters.

13. The computerized apparatus of claim 8, wherein the plurality of instructions are further configured to, when executed by the processor apparatus, cause the processor apparatus to:

enable the scrambling functionality in response to a determination that a rate of transmission over the data interface exceeds a threshold.

14. The computerized apparatus of claim 8, further comprising a register;

wherein the plurality of instructions are further configured to, when executed by the processor apparatus, cause the processor apparatus to read data on the register to evaluate whether the scrambling functionality may be enabled on the source device.

15. A computerized apparatus comprising:

a data interface configured to be in data communication with another computerized apparatus and a processor apparatus; and

a non-transitory computer-readable apparatus comprising a storage medium, the storage medium having a computer program stored thereon, the computer program comprising a plurality of instructions that are configured to, when executed by the processor apparatus, cause the processor apparatus to;

receive data representative of an indication that the other computerized apparatus is configured to support scrambling operation;

responsive to the indication, determine whether a scrambling functionality may be enabled on the computerized apparatus;

responsive to the scrambling functionality not being enabled on the computerized apparatus;

cause the other computerized apparatus to disable the scrambling operation; and

transmit a clock signal at a first amplitude; and

responsive to the scrambling functionality being enabled on the computerized apparatus, transmit a clock signal to the other computerized apparatus at a second amplitude, the second amplitude being less than the first amplitude, the transmission of the clock signal at the second amplitude configured to cause a reduction of electro-magnetic interference (EMI) of the clock signal during the transmission of the clock signal as compared with transmission of the clock signal at the first amplitude.

16. The computerized apparatus of claim 15, wherein the transmission of the clock signal to the other computerized apparatus at the second amplitude is performed responsive to a change in a display resolution associated with the data communication.

17. The computerized apparatus of claim 15, wherein the indication that the other computerized apparatus is configured to support scrambling operation is advertised by the other computerized apparatus.

18. The computerized apparatus of claim 15, wherein the computerized apparatus comprises a source device, and the other computerized apparatus comprises a sink device configured to receive scrambled and non-scrambled transmissions from the source device.

19. The computerized apparatus of claim 15, wherein the clock signal does not exceed a first data rate responsive to the scrambling functionality not being enabled.

20. The computerized apparatus of claim 15, wherein the clock signal exceeds the first data rate responsive to the scrambling functionality being enabled.