Semiconductor device having one or more titanium interlayers and method of making the same

• US 10,438,813 B2
• Filed: 11/13/2017
• Issued: 10/08/2019
• Est. Priority Date: 11/13/2017
• Status: Active Grant

• Current Assignee: Alpha & Omega Semiconductor, Ltd.
• Original Assignee: Alpha & Omega Semiconductor, Ltd.
• Inventors: He, Wei, Wiebe, Chris, Xue, Hongyong
• Primary Examiner(s): Chang, Jay C
• Assistant Examiner(s): Liu, Mikka
• Application Number:
  US15/811,417
• Publication Number:
  US 20190148165A1
• Time in Patent Office: 694 Days
• CPC Class Codes: H01L 21/32134 by liquid etching only
• CPC Class Codes: H01L 21/76838 characterised by the formation and the after-treatment of the conductors etching for patterning the conductors H01L21/3213
• CPC Class Codes: H01L 21/76849 the layer being positioned on top of the main fill metal
• CPC Class Codes: H01L 23/53214 the principal metal being aluminium
• CPC Class Codes: H01L 23/53223 Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
• CPC Class Codes: H01L 23/53266 Additional layers associated with refractory-metal layers, e.g. adhesion, barrier, cladding layers
• CPC Class Codes: H01L 23/562 Protection against mechanical damage H01L23/02, H01L23/28 take precedence

Abstract

A semiconductor device comprising a substrate layer, an epitaxial layer, a dielectric layer, a first aluminum layer, a first titanium interlayer and a second aluminum layer. The first titanium interlayer is disposed between the first aluminum layer and the second aluminum layer. A process for fabricating a semiconductor device comprising the steps of: preparing a semiconductor wafer; depositing a first aluminum layer onto the semiconductor wafer; depositing a first titanium interlayer onto the first aluminum layer; depositing a second aluminum layer onto the first titanium interlayer; applying an etching process so that a plurality of trenches are formed so as to expose a plurality of top surfaces of a dielectric layer; and applying a singulation process so as to form a plurality of separated semiconductor devices.

Claims

1. A semiconductor device comprising:

a substrate layer, the substrate layer being a heavily doped first conductivity type silicon substrate layer;

an epitaxial layer directly attached to the substrate layer, the epitaxial layer being a lightly doped first conductivity type silicon epitaxial layer;

a dielectric layer directly attached to the epitaxial layer;

a first aluminum layer directly attached to the dielectric layer;

a first titanium interlayer directly attached to the first aluminum layer;

a second aluminum layer directly attached to the first titanium interlayer;

wherein the first titanium interlayer is disposed between the first aluminum layer and the second aluminum layer;

wherein a thickness of the first titanium interlayer is in a range from ten angstroms to five hundred angstroms; and

wherein a thickness of the first aluminum layer and a thickness of the second aluminum layer are in a range from one micron to four microns.

2. The semiconductor device of claim 1, wherein the thickness of the first titanium interlayer is in a range from ninety angstroms to one hundred and ten angstroms.

3. The semiconductor device of claim 1, wherein the epitaxial layer comprises

a plurality of source regions;

and

a plurality of trenches filled with a same insulated gate material;

wherein the first aluminum layer directly contacts the plurality of source regions;

wherein the epitaxial layer is made of a silicon material; and

wherein a separation trench divides the first aluminum layer, the first titanium interlayer and the second aluminum layer into a first portion in a termination area and a second portion in an active area.

4. The semiconductor device of claim 1,

wherein the substrate layer has ion concentration in a range above 10¹⁸ cm⁻

3; and

wherein the epitaxial layer has ion concentration in a range below 10¹⁶ cm<sup>−

3</sup>.

5. A semiconductor device comprising:

a substrate layer, the substrate layer being a heavily doped first conductivity type silicon substrate layer;

an epitaxial layer directly attached to the substrate layer, the epitaxial layer being a lightly doped first conductivity type silicon epitaxial layer;

a dielectric layer directly attached to the epitaxial layer;

a first aluminum layer directly attached to the dielectric layer;

a first titanium interlayer directly attached to the first aluminum layer;

a second aluminum layer directly attached to the first titanium interlayer;

wherein the first titanium interlayer is disposed between the first aluminum layer and the second aluminum layer;

wherein a second titanium interlayer is directly attached to the second aluminum layer;

wherein a third aluminum layer is directly attached to the second titanium interlayer; and

wherein the second titanium interlayer is disposed between the second aluminum layer and the third aluminum layer.

6. The semiconductor device of claim 5, wherein a third titanium interlayer is directly attached to the third aluminum layer;

wherein a fourth aluminum layer is directly attached to the third titanium interlayer; and

wherein the third titanium interlayer is disposed between the third aluminum layer and the fourth aluminum layer.

7. The semiconductor device of claim 6, wherein a thickness of the first titanium interlayer, a thickness of the second titanium interlayer and a thickness of the third titanium interlayer are in a range from ninety angstroms to one hundred and ten angstroms.

8. The semiconductor device of claim 7, wherein a thickness of the first aluminum layer, a thickness of the second aluminum layer, a thickness of the third aluminum layer and a thickness of the fourth aluminum layer are in a range from one micron to four microns.

9. The semiconductor device of claim 5, wherein the epitaxial layer comprises a plurality of source regions;

and

a plurality of trenches filled with a same insulated gate material;

wherein the first aluminum layer directly contacts the plurality of source regions;

wherein the epitaxial layer is made of a silicon material; and

wherein a separation trench divides the first aluminum layer, the first titanium interlayer and the second aluminum layer into a first portion in a termination area and a second portion in an active area.

10. The semiconductor device of claim 5,

wherein the substrate layer has ion concentration in a range above 10¹⁸ cm⁻

3; and

wherein the epitaxial layer has ion concentration in a range below 10¹⁶ cm<sup>−

3</sup>.