Methods of fabricating magnetic tunnel junctions integrated with selectors

• US 10,438,996 B2
• Filed: 01/08/2018
• Issued: 10/08/2019
• Est. Priority Date: 01/08/2018
• Status: Active Grant

• Current Assignee: Integrated Silicon Solution Incorporated (Uphill Investment Co.)
• Original Assignee: Spin Memory, Inc.
• Inventors: Kim, Kuk-Hwan, Beery, Dafna, Walker, Andy, Levi, Amitay
• Primary Examiner(s): Au, Bac H
• Application Number:
  US15/865,247
• Publication Number:
  US 20190214430A1
• Time in Patent Office: 638 Days
• CPC Class Codes: G11C 11/161 details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell
• CPC Class Codes: G11C 11/1659 Cell access
• CPC Class Codes: G11C 2211/5615 Multilevel magnetic memory cell using non-magnetic non-conducting interlayer, e.g. MTJ
• CPC Class Codes: H01F 10/3254 the spacer being semiconducting or insulating, e.g. for spin tunnel junction [STJ]
• CPC Class Codes: H01F 10/3272 by use of anti-parallel coupled [APC] ferromagnetic layers, e.g. artificial ferrimagnets [AFI], artificial [AAF] or synthetic [SAF] anti-ferromagnets
• CPC Class Codes: H01F 10/3286 Spin-exchange coupled multilayers having at least one layer with perpendicular magnetic anisotropy
• CPC Class Codes: H01F 10/329 Spin-exchange coupled multilayers wherein the magnetisation of the free layer is switched by a spin-polarised current, e.g. spin torque effect
• CPC Class Codes: H01F 41/32 for applying conductive, insulating or magnetic material on a magnetic film , specially adapted for a thin magnetic film
• CPC Class Codes: H01L 21/3212 by chemical mechanical polishing [CMP]
• CPC Class Codes: H01L 21/76802 by forming openings in dielectrics
• CPC Class Codes: H01L 21/7684 Smoothing; Planarisation
• CPC Class Codes: H01L 21/76877 Filling of holes, grooves or trenches, e.g. vias, with conductive material
• CPC Class Codes: H10B 61/10 comprising components having two electrodes, e.g. diodes or MIM elements
• CPC Class Codes: H10N 50/01 Manufacture or treatment
• CPC Class Codes: H10N 50/80 Constructional details
• CPC Class Codes: H10N 50/85 Magnetic active materials
• CPC Class Codes: H10N 70/021 Formation of the switching material, e.g. layer deposition
• CPC Class Codes: H10N 70/24 based on migration or redistribution of ionic species, e.g. anions, vacancies
• CPC Class Codes: H10N 70/826 adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
• CPC Class Codes: H10N 70/8833 Binary metal oxides, e.g. TaOx

Abstract

Methods of fabricating devices including arrays of integrated Magnetic Tunnel Junctions (MTJs) and corresponding selectors in an array of cells. The array of cells can include a plurality of source lines disposed in columns, set of selectors coupled to respective source lines, MJT structures coupled to respective selectors and a plurality of bit lines disposed in rows and coupled to respective sets of MTJ structures. The array of cells can also include buffers coupled between respective selectors and respective MTJ structures. In addition, multiple arrays can be fabricated on top of each other to implement vertical three-dimensional (3D) MTJ devices.

Claims

1. A method of fabricating a Magnetic Tunnel Junction (MTJ) device comprising:

forming a plurality of source line conductors in a plurality of source line trenches, wherein a surface of the source line conductors are coplanar with a surface of a first dielectric layer;

forming a second dielectric layer on the first dielectric layer and the source line conductors;

forming an array of selector openings in the second dielectric layer, wherein sets of selector openings extended to respective source line conductors;

forming an array of selectors in the array of selector openings, wherein a surface of the selectors are coplanar with a surface of the second dielectric layer; and

forming an array of MTJ pillars coupled to the array of selectors.

2. The method of claim 1, further comprising:

forming a third dielectric layer on the second dielectric layer and the array of selectors;

forming an array of buffer openings in the third dielectric layer, wherein the buffer openings extend to respective selectors;

forming an array of buffers in the array of buffer openings; and

wherein the array of MTJ pillars are coupled to the array of selectors through the array of buffers.

3. The method of claim 2, wherein:

forming the array of buffer openings in the third dielectric layer includes selectively etching the third dielectric layer exposed by a buffer mask to form the array of buffer openings; and

forming the array of buffers in the third dielectric layer includes,

depositing a buffer layer on the third dielectric layer and filling the array of buffer openings; and

chemically-mechanically polishing the buffer layer to remove the buffer layer on the third dielectric layer and leaving the buffer layer in the array of buffer opening to form the array of buffers.

4. The method of claim 1, further comprising:

forming the plurality of source line trenches disposed in columns in the first dielectric layer.

5. The method of claim 4, wherein:

forming the plurality of source line trenches in the first dielectric layer includes selectively etch the first dielectric layer exposed by a source line trench mask to form the plurality of source line trenches; and

forming the plurality of source line conductors includes,

depositing a first conductive layer on the first dielectric layer and filling the plurality of source line trenches; and

chemical-mechanical polishing the first conductive layer to remove the first conductive layer on the first dielectric layer and leaving the first conductive layer in the plurality of source line trenches to form the plurality of source line conductors.

6. The method of claim 5, wherein forming the plurality of source line conductors further includes depositing a first liner layer on the first dielectric layer including the plurality of source line trenches before depositing the first conductive layer.

7. The method of claim 5, wherein forming the plurality of source line conductors further includes depositing a first capping layer on the plurality of source line conductors after chemical-mechanical polishing of the first conductive layer.

8. The method of claim 1, wherein:

forming the array of selector opening in the second dielectric layer includes selectively etching the second dielectric layer exposed by a selector mask to form the array of selector openings; and

forming the array of selectors includes,

depositing a selector layer on the second dielectric layer and filling the array of selector openings; and

chemically-mechanically polishing the selector layer to remove the selector layer on the second dielectric layer and leaving the selector layer in the array of selector openings to form the array of selectors.

9. A method of forming a Magnetic Tunnel Junction (MTJ) device comprising:

forming a plurality of source line trenches disposed in columns in a first dielectric layer;

forming a plurality of source line conductors in the plurality of source line trenches;

forming a selector layer over the first dielectric layer and the plurality of source line conductors;

forming a first barrier layer on the selector layer;

forming a reference magnetic layer over the first barrier layer;

forming a non-magnetic tunneling barrier layer over the reference magnetic layer;

forming a free magnetic layer over the non-magnetic tunneling barrier layer;

forming a first portion of an array of pillars from the free magnetic layer, the non-magnetic tunneling barrier layer and reference magnetic layer;

forming a conformal dielectric layer on the exposed portions of the free magnetic layer, the non-magnetic tunnel barrier layer, and the reference magnetic layer in the first portion of the pillars and the exposed portions of the first barrier layer; and

forming a second portion of the array of pillars from the first barrier layer and the select layer, wherein portions of the conformal dielectric layer along sidewalls of the first portion of the array of pillars protect one or more of the free magnetic layer, the non-magnetic tunneling barrier layer and the reference magnetic layer during forming the second portion of the array of pillars.

10. The method of claim 9, further comprising:

forming a buffer layer over the selector layer; and

forming the second portion of the array of pillars from the first barrier layer, the buffer layer and the select layer, wherein portions of the conformal dielectric layer along sidewalls of the first portion of the array of pillars protect one or more of the free magnetic layer, the non-magnetic tunneling barrier layer and the reference magnetic layer during forming the second portion of the array of pillars.

11. The method of claim 9, wherein:

forming the plurality of source line trenches in the first dielectric layer includes selectively etch the first dielectric layer exposed by a source line trench mask to form the plurality of source line trenches; and

forming the plurality of source line conductors includes,

depositing a first conductive layer on the first dielectric layer and filling the plurality of source line trenches; and

chemical-mechanical polishing the first conductive layer to remove the first conductive layer on the first dielectric layer and leaving the first conductive layer in the plurality of source line trenches to form the plurality of source line conductors.

12. A method of forming a Magnetic Tunnel Junction (MTJ) device comprising:

forming a source line layer on a first dielectric layer including in a plurality of trenches disposed in columns in the first dielectric layer;

forming a selector layer over the source line layer including in the plurality of trenches;

planarizing the selector layer and the source line layer to remove the selector layer and the source line layer on the first dielectric layer and leaving the source line layer and selector layer in the plurality of trenches;

forming a reference magnetic layer over the first barrier layer;

forming a non-magnetic tunneling barrier layer over the reference magnetic layer;

forming a free magnetic layer over the non-magnetic tunneling barrier layer;

forming a first portion of an array of pillars from the free magnetic layer, the non-magnetic tunneling barrier layer and reference magnetic layer;

forming a conformal dielectric layer on the exposed portions of the free magnetic layer, the non-magnetic tunnel barrier layer, and reference magnetic layer in the first portion of the pillars and the exposed portions of the first barrier layer; and

forming a second portion of the array of pillars from the first barrier layer and select layer, wherein portions of the conformal dielectric layer along sidewall of the first portion of the array of pillars protect one or more the free magnetic layer, the non-magnetic tunneling barrier layer and the reference magnetic layer during forming the second portion of the array of pillars.

13. The method of claim 12, further comprising:

forming a first barrier layer on coplanar exposed portions of the selector layer, source line layer and first dielectric layer before forming the reference layer.

14. The method of claim 12, further comprising:

forming a buffer layer on coplanar exposed portions of the selector layer, source line layer and first dielectric layer before forming the reference layer; and

forming the second portion of the array of pillars from the buffer layer, wherein portions of the conformal dielectric layer along sidewalls of the first portion of the array of pillars protect one or more of the free magnetic layer, the non-magnetic tunneling barrier layer and the reference magnetic layer during forming the second portion of the array of pillars.

15. A method of forming a Magnetic Tunnel Junction (MTJ) device comprising:

forming a source line layer on a first dielectric layer including in a plurality of trenches;

forming a selector layer on the source line layer including in the plurality of trenches;

forming a buffer layer on the selector layer including in the plurality of trenches;

planarizing the buffer layer, the selector layer and the source line layer to remove buffer layer, the selector layer and the source line layer on the first dielectric layer and leaving buffer layer, the source line layer and selector layer in the plurality of trenches;

forming a first barrier layer on the coplanar exposed portions of the buffer layer, the selector layer, source line layer and first dielectric layer;

forming a reference magnetic layer over the first barrier layer;

forming a non-magnetic tunneling barrier layer over the reference magnetic layer;

forming a free magnetic layer over the non-magnetic tunneling barrier layer; and

forming an array of pillars from the free magnetic layer, the non-magnetic tunneling barrier layer and reference magnetic layer.

16. A method of forming a Magnetic Tunnel Junction (MTJ) device comprising:

forming a plurality of bit line conductors in a plurality of bit line trenches, wherein a surface of the bit line conductors are coplanar with a surface of a first dielectric layer;

forming a free magnetic layer over the plurality of bit line conductors and first dielectric layer;

forming a non-magnetic tunneling barrier layer over the free magnetic layer;

forming a reference magnetic layer over the non-magnetic tunneling barrier layer;

forming a selector layer over the reference magnetic layer; and

forming an array of pillars from the selector layer, the reference magnetic layer, the non-magnetic tunneling barrier layer and the free magnetic layer.

17. The method of claim 16, further comprising:

forming a buffer layer over the reference magnetic layer before forming the selector layer; and

forming the array of pillars from the selector layer, the buffer layer, the reference magnetic layer, the non-magnetic tunneling barrier layer and the free magnetic layer.

18. The method of claim 16, further comprising:

forming the first dielectric layer on a wafer; and

forming the plurality of bit line trenches disposed in rows in the first dielectric layer.

19. The method of claim 18, wherein:

forming the plurality of bit line trenches in the first dielectric layer includes selectively etch the first dielectric layer exposed by a bit line trench mask to form the plurality of bit line trenches; and

forming the plurality of bit line conductors includes,

depositing a first conductive layer on the first dielectric layer and filling the plurality of bit line trenches; and

chemical-mechanical polishing the first conductive layer to remove the first conductive layer on the first dielectric layer and leaving the first conductive layer in the plurality of bit line trenches to form the plurality of bit line conductors.

20. The method of claim 19, wherein forming the plurality of bit line conductors further includes depositing a first liner layer on the first dielectric layer including the plurality of bit line trenches before depositing the first conductive layer.

21. The method of claim 19, wherein forming the plurality of bit line conductors further includes depositing a first capping layer on the plurality of bit line conductors after chemical-mechanical polishing of the first conductive layer.