Electrode contacts

• US 10,439,159 B2
• Filed: 05/08/2018
• Issued: 10/08/2019
• Est. Priority Date: 12/25/2013
• Status: Active Grant

• Current Assignee: IGNIS Innovation Incorporated
• Original Assignee: IGNIS Innovation Incorporated
• Inventors: Chaji, Gholamreza
• Primary Examiner(s): Yechuri, Sitaramarao S
• Application Number:
  US15/973,696
• Publication Number:
  US 20180261795A1
• Time in Patent Office: 518 Days
• CPC Class Codes: H10K 2102/3026 Top emission
• CPC Class Codes: H10K 50/813 characterised by their shape
• CPC Class Codes: H10K 50/814 combined with auxiliary electrodes, e.g. ITO layer combined with metal lines
• CPC Class Codes: H10K 50/816 Multilayers, e.g. transparent multilayers
• CPC Class Codes: H10K 50/822 characterised by their shape
• CPC Class Codes: H10K 50/824 combined with auxiliary electrodes
• CPC Class Codes: H10K 50/828 Transparent cathodes, e.g. comprising thin metal layers
• CPC Class Codes: H10K 59/123 Connection of the pixel electrodes to the thin film transistors [TFT]
• CPC Class Codes: H10K 71/60 Forming conductive regions or layers, e.g. electrodes

Abstract

A device structure providing contact to conductive layers via a deep trench structure is disclosed. The device includes a first dielectric layer including a first opening. A first conductive layer is deposited over the first dielectric layer and the first opening. A second dielectric layer is deposited on the first conductive layer. The second dielectric layer includes a second opening. A second conductive layer is deposited over the second dielectric layer and the first and second openings. A semiconductor layer is deposited on the second dielectric layer such that the semiconductor layer is not continuous on at least part of the walls of the first or second openings. A top electrode layer is deposited on the semiconductor layer. The top electrode layer is in contact with the second conductive layer on at least part of the walls of the first or second openings.

Claims

1. A device structure providing contact to conductive layers via a deep trench structure, the device structure comprising:

a material structure including a top surface and a side wall integral with and joining the top surface;

a first conductive layer deposited over the material structure on the top surface and the side wall;

at least one material layer deposited on the first conductive layer, the at least one material layer being continuous on the top surface of the material structure, continuously covering a first portion of the side wall, and having at least one discontinuity on a second portion of the side wall; and

a second conductive layer deposited on the at least one material layer, the second conductive layer in contact with the first conductive layer on the second portion of the side wall and separated from the first conductive layer by the at least one material layer on the first portion of the side wall,

the at least one material layer comprised of material different from materials of the first and second conductive layers, the at least one material layer preventing electrical contact between the first and second conductive layers on the first portion of the side wall, and the at least one discontinuity in the at least one material layer for providing electrical contact between the first and second conductive layers on the second portion of the side wall.

2. The device structure of claim 1, wherein the side wall is created by one of lithography, lift off, moulding or shadow masking.

3. The device structure of claim 1, wherein the at least one material layer is part of an organic light emitting diode structure.

4. The device structure of claim 1, wherein the material structure comprises at least one of a silicon-nitride dielectric layer and a polymer dielectric layer.

5. The device structure of claim 1, wherein the material structure comprises at least one layer, and wherein the at least one layer of the material structure, the first conductive layer, and the at least one material layer are deposited via at least one of PECVD, CVD, sputtering, vapor deposition, printing, spin coating, and spray coating.

6. The device structure of claim 1, wherein the first portion of the side wall comprises a lower portion of the side wall and the second portion of the side wall comprises a portion of the side wall between the lower portion of the side wall and the top surface.

7. The device structure of claim 1, wherein the at least one material layer comprises a semiconductor layer.

8. The device structure of claim 1, wherein the at least one material layer comprises a dielectric layer.

9. A method of fabricating a device structure providing contact to conductive layers via a deep trench structure, the method comprising:

fabricating a material structure including a top surface and a side wall integral with and joining the top surface;

depositing a first conductive layer over the material structure on the top surface and the side wall;

depositing at least one material layer on the conductive layer, the at least one material layer being continuous on the top surface of the material structure, continuously covering a first portion of the side wall, and having at least one discontinuity on a second portion of the side wall; and

depositing a second conductive layer on the at least one material layer, the second conductive layer in contact with the first conductive layer on the second portion of the side wall and separated from the first conductive layer by the at least one material layer on the first portion of the side wall,

the at least one material layer comprised of material different from materials of the first and second conductive layers, the at least one material layer preventing electrical contact between the first and second conductive layers on the first portion of the side wall, and the at least one discontinuity in the at least one material layer for providing electrical contact between the first and second conductive layers on the second portion of the side wall.

10. The method of claim 9, wherein the side wall is fabricated at least in part by one of lithography, lift off, moulding or shadow masking.

11. The method of claim 9, wherein the at least one material layer is part of an organic light emitting diode structure.

12. The method of claim 9, wherein the material structure comprises at least one of a silicon-nitride dielectric layer and a polymer dielectric layer.

13. The method of claim 9, wherein the material structure comprises at least one layer, and wherein the at least one layer of the material structure is fabricated at least partly via, and the first conductive layer and the at least one material layer are deposited via, at least one of PECVD, CVD, sputtering, vapor deposition, printing, spin coating, and spray coating.

14. The method of claim 9, wherein the first portion of the side wall comprises a lower portion of the side wall and the second portion of the side wall comprises a portion of the side wall between the lower portion of the side wall and the top surface.

15. The method of claim 9, wherein the at least one material layer comprises a semiconductor layer.

16. The method of claim 9, wherein the at least one material layer comprises a dielectric layer.