Computing device executing program performing method of analyzing power noise in semiconductor device, semiconductor device design method, and program storage medium storing program
First Claim
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1. A method of generating a semiconductor device design in a computing device, the method comprising:
- designing a power network for a semiconductor device and a plurality of cells connected to the power network to obtain a generated semiconductor device design;
analyzing power noise of the power network based on modeling the semiconductor device as a power network model and a transistor model,generating a generated semiconductor device design as a result of analyzing the power noise of the power network based on first modified current information and second modified current information, wherein the first modified current information is generated at a first time as a result of a first analysis based on an assumption that the power network model exists, and the second modified current information is generated at a second time after the first time by modifying present current information based on an ideal supply voltage condition using the result of the first analysis; and
storing at least part of the generated semiconductor device design in a memory associated with the computing device.
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Abstract
A method of analyzing power noise in a semiconductor device includes; generating modified current information by modifying present current information based on a previous analysis result, updating a current vector based on the modified current information, and generating a present analysis result by calculating a voltage vector from the updated current vector.
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Citations
20 Claims
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1. A method of generating a semiconductor device design in a computing device, the method comprising:
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designing a power network for a semiconductor device and a plurality of cells connected to the power network to obtain a generated semiconductor device design; analyzing power noise of the power network based on modeling the semiconductor device as a power network model and a transistor model, generating a generated semiconductor device design as a result of analyzing the power noise of the power network based on first modified current information and second modified current information, wherein the first modified current information is generated at a first time as a result of a first analysis based on an assumption that the power network model exists, and the second modified current information is generated at a second time after the first time by modifying present current information based on an ideal supply voltage condition using the result of the first analysis; and storing at least part of the generated semiconductor device design in a memory associated with the computing device. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method of generating a semiconductor device design in a computing device, the method comprising:
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designing a power network for a semiconductor device and a plurality of cells connected to the power network to obtain a generated semiconductor device design; analyzing power noise of the power network based on modeling the semiconductor device as a power network model and a transistor model; generating a generated semiconductor device design as a result of analyzing power noise of the power network to generate a result of analyzing the power noise of the power network based on modeling the semiconductor device as a power network model and a transistor model and based on first modified current information and second modified current information, wherein the first modified current information is generated at a first time as a result of a first analysis by modifying first present current information based on an ideal supply voltage condition using the result of a previous analysis of the power noise of the power network, and the second modified current information is generated at a second time after the first time as a result of a second analysis by modifying second present current information based on an ideal supply voltage condition using the result of the first analysis; and storing at least part of the generated semiconductor device design in a memory associated with the computing device. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19)
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20. A method of generating a semiconductor device design in a computing device, the method comprising:
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designing a power network for a semiconductor device and a plurality of cells connected to the power network to obtain a generated semiconductor device design; analyzing power noise of the power network based on modeling the semiconductor device as a power network model and a transistor model; generating a generated semiconductor device design as a result of analyzing power noise of the power network to generate a result of analyzing the power noise of the power network based on modeling the semiconductor device as a power network model and a transistor model and based on first modified current information, second modified current information and third modified current information, wherein the first modified current information is generated at a first time as a result of a first analysis by modifying first present current information based on an assumption that the power network model exists, the second modified current information is generated at a second time after the first time as a result of a second analysis by modifying second present current information based on an ideal supply voltage condition using the result of the first analysis of the power noise of the power network, and the third modified current information is generated at a third time after the second time as a result of a third analysis by modifying third present current information based on an ideal supply voltage condition using the result of the second analysis; and storing at least part of the generated semiconductor device design in a memory associated with the computing device.
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Specification