Transmitter-receiver system
First Claim
1. A transmitter-receiver system comprising:
- a transmitter arranged to transmit a wavelet;
a receiver arranged to receive a wavelet;
a wavelet generator arranged to generate a reference wavelet;
timing circuitry arranged to receive a reference clock signal, output a first trigger signal for triggering transmission of a wavelet and output a second trigger signal for triggering generation of a reference wavelet, the timing circuitry comprising a delay line including at least one delay element and being arranged to receive a signal at an input of the delay line and transmit a delayed signal at an output of the delay line, wherein a state of each delay element of at least a subset of said at least one delay elements is switchable between at least a first state and a second state, wherein a delay element in said first state presents a first propagation delay, and a delay element in said second state present a second propagation delay which differs from the first propagation delay by a value which is smaller than a period of the reference clock signal, wherein a total propagation delay of the delay line is configurable by controlling the state of each delay element of said subset; and
a controller arranged to control a delay between the first trigger signal and the second trigger signal by controlling the total propagation delay of the delay line;
wherein the receiver further comprises a correlator circuit arranged to correlate the reference wavelet with a received wavelet for at least one setting of the total propagation delay, and wherein the timing circuitry further comprises trigger circuitry arranged to receive, at an input of the trigger circuitry, a clock signal and transmit, at an output of the trigger circuit, the second trigger signal in response to receiving a number of rising and/or falling edges of the clock signal, wherein the controller is arranged to control a delay between the output of the first trigger signal and the second trigger signal by controlling the total propagation delay of the delay line and said number of rising and/or falling edges.
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Accused Products
Abstract
According to one aspect of the inventive concept there is provided a transmitter-receiver system comprising: a transmitter arranged to transmit a wavelet; a receiver arranged to receive a wavelet; a wavelet generator arranged to generate a reference wavelet; and timing circuitry arranged to receive a reference clock signal, output a first trigger signal for triggering transmission of a wavelet and output a second trigger signal for triggering generation of a reference wavelet. The timing circuitry further comprises a delay line including at least one delay element and being arranged to receive a signal at an input of the delay line and transmit a delayed signal at an output of the delay line, wherein a state of each delay element of at least a subset of said at least one delay elements is switchable between at least a first state and a second state. A delay element in said first state, i.e. switched to its first state, presents a first propagation delay. A delay element in said second state, i.e. switched to its second state, presents a second propagation delay which differs from the first propagation delay by a value which is smaller than a period of the reference clock signal. Thereby a total propagation delay of the delay line is configurable by controlling the state of each delay element of said subset. The system further comprises a controller arranged to control a delay between the first trigger signal and the second trigger signal by controlling the total propagation delay of the delay line. The system is arranged to correlate the reference wavelet with a received wavelet for at least one setting of the total propagation delay.
29 Citations
21 Claims
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1. A transmitter-receiver system comprising:
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a transmitter arranged to transmit a wavelet; a receiver arranged to receive a wavelet; a wavelet generator arranged to generate a reference wavelet; timing circuitry arranged to receive a reference clock signal, output a first trigger signal for triggering transmission of a wavelet and output a second trigger signal for triggering generation of a reference wavelet, the timing circuitry comprising a delay line including at least one delay element and being arranged to receive a signal at an input of the delay line and transmit a delayed signal at an output of the delay line, wherein a state of each delay element of at least a subset of said at least one delay elements is switchable between at least a first state and a second state, wherein a delay element in said first state presents a first propagation delay, and a delay element in said second state present a second propagation delay which differs from the first propagation delay by a value which is smaller than a period of the reference clock signal, wherein a total propagation delay of the delay line is configurable by controlling the state of each delay element of said subset; and a controller arranged to control a delay between the first trigger signal and the second trigger signal by controlling the total propagation delay of the delay line; wherein the receiver further comprises a correlator circuit arranged to correlate the reference wavelet with a received wavelet for at least one setting of the total propagation delay, and wherein the timing circuitry further comprises trigger circuitry arranged to receive, at an input of the trigger circuitry, a clock signal and transmit, at an output of the trigger circuit, the second trigger signal in response to receiving a number of rising and/or falling edges of the clock signal, wherein the controller is arranged to control a delay between the output of the first trigger signal and the second trigger signal by controlling the total propagation delay of the delay line and said number of rising and/or falling edges. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. A transmitter-receiver system comprising:
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a transmitter arranged to transmit a wavelet; a receiver arranged to receive a wavelet; a wavelet generator arranged to generate a reference wavelet; timing circuitry arranged to receive a reference clock signal, output a first trigger signal for triggering transmission of a wavelet and output a second trigger signal for triggering generation of a reference wavelet, the timing circuitry comprising a delay line including at least one delay element and being arranged to receive a signal at an input of the delay line and transmit a delayed signal at an output of the delay line, wherein a state of each delay element of at least a subset of said at least one delay elements is switchable between at least a first state and a second state, wherein a delay element in said first state presents a first propagation delay, and a delay element in said second state present a second propagation delay which differs from the first propagation delay by a value which is smaller than a period of the reference clock signal, wherein a total propagation delay of the delay line is configurable by controlling the state of each delay element of said subset; and a controller arranged to control a delay between the first trigger signal and the second trigger signal by controlling the total propagation delay of the delay line; wherein the receiver further comprises a correlator circuit arranged to correlate the reference wavelet with a received wavelet for at least one setting of the total propagation delay, and wherein the controller is further arranged to control each delay element of said subset of delay elements to said first state and tune the first propagation delay of each delay element of said subset of delay elements such that the total propagation delay of the delay line corresponds to an integer number of periods of the reference clock signal or half periods of the reference clock signal. - View Dependent Claims (17)
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18. A transmitter-receiver system comprising:
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a transmitter arranged to transmit a wavelet; a receiver arranged to receive a wavelet; a wavelet generator arranged to generate a reference wavelet; timing circuitry arranged to receive a reference clock signal, output a first trigger signal for triggering transmission of a wavelet and output a second trigger signal for triggering generation of a reference wavelet, the timing circuitry comprising a delay line including at least one delay element and being arranged to receive a signal at an input of the delay line and transmit a delayed signal at an output of the delay line, wherein a state of each delay element of at least a subset of said at least one delay elements is switchable between at least a first state and a second state, wherein a delay element in said first state presents a first propagation delay, and a delay element in said second state present a second propagation delay which differs from the first propagation delay by a value which is smaller than a period of the reference clock signal, wherein a total propagation delay of the delay line is configurable by controlling the state of each delay element of said subset; and a controller arranged to control a delay between the first trigger signal and the second trigger signal by controlling the total propagation delay of the delay line; wherein the receiver further comprises a correlator circuit arranged to correlate the reference wavelet with a received wavelet for at least one setting of the total propagation delay, and wherein the delay line includes an additional delay element having a propagation delay which is tunable, wherein the controller is arranged to control each delay element of said subset of delay elements to said first state and tune the propagation delay of said additional delay element such that the total propagation delay of the delay line corresponds to an integer number of periods of the reference clock signal or half periods of the reference clock signal. - View Dependent Claims (19)
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20. A transmitter-receiver system comprising:
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a transmitter arranged to transmit a wavelet; a receiver arranged to receive a wavelet; a wavelet generator arranged to generate a reference wavelet; timing circuitry arranged to receive a reference clock signal, output a first trigger signal for triggering transmission of a wavelet and output a second trigger signal for triggering generation of a reference wavelet, the timing circuitry comprising a delay line including at least one delay element and being arranged to receive a signal at an input of the delay line and transmit a delayed signal at an output of the delay line, wherein a state of each delay element of at least a subset of said at least one delay elements is switchable between at least a first state and a second state, wherein a delay element in said first state presents a first propagation delay, and a delay element in said second state present a second propagation delay which differs from the first propagation delay by a value which is smaller than a period of the reference clock signal, wherein a total propagation delay of the delay line is configurable by controlling the state of each delay element of said subset; and a controller arranged to control a delay between the first trigger signal and the second trigger signal by controlling the total propagation delay of the delay line; wherein the receiver further comprises a correlator circuit arranged to correlate the reference wavelet with a received wavelet for at least one setting of the total propagation delay, and wherein the controller is arranged to; determine a first setting of the states of the delay elements of said subset of delay elements, such that a total propagation delay of the delay line corresponds to a first integer number of periods of the reference clock signal or half periods of the reference clock signal, and determine a second setting of the states of the delay elements of said subset of delay elements, such that a total propagation delay of the delay line corresponds to an integer number of periods of the reference clock signal or half periods of the reference clock signal. - View Dependent Claims (21)
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Specification