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Configurable processor with in-package look-up table

  • US 10,445,067 B2
  • Filed: 11/28/2018
  • Issued: 10/15/2019
  • Est. Priority Date: 05/06/2016
  • Status: Active Grant
First Claim
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1. A configurable processor including a plurality of configurable computing elements, each of said configurable computing elements comprising:

  • at least a programmable memory array on a memory level for storing at least a portion of a look-up table (LUT) for a mathematical function;

    at least an arithmetic logic circuit (ALC) on a logic level for performing at least an arithmetic operation on selected data from said LUT, wherein said logic level is a different physical level than said memory level; and

    means for communicatively coupling said programmable memory array and said ALC;

    wherein said mathematical function includes more operations than arithmetic operations performable by said ALC.

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