Reception according to a data transfer protocol of data directed to any of a plurality of destination entities

• US 10,445,156 B2
• Filed: 05/04/2016
• Issued: 10/15/2019
• Est. Priority Date: 06/15/2005
• Status: Active Grant

• Current Assignee: Xilinx, Inc. (Advanced Micro Devices, Inc.)
• Original Assignee: SolarFlare Communications Incorporated (Advanced Micro Devices, Inc.)
• Inventors: Pope, Steven Leslie, Roberts, Derek Edward, Riddoch, David James, Law, Greg, Grantham, Steve, Slattery, Matthew
• Primary Examiner(s): Park, Jeong S
• Application Number:
  US15/146,032
• Publication Number:
  US 20160246657A1
• Time in Patent Office: 1,259 Days
• CPC Class Codes: G06F 13/00 Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units interface circuits for specific input/output devices G06F3/00 ; multiprogram control therefor G06F9/46; multiprocessor systems G06F15/16
• CPC Class Codes: G06F 13/14 Handling requests for interconnection or transfer
• CPC Class Codes: G06F 15/16 Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs coordinating program control therefor G06F9/52; in regulating and control system G05B
• CPC Class Codes: G06F 9/30181 Instruction operation extension or modification
• CPC Class Codes: G06F 9/546 Message passing systems or structures, e.g. queues
• CPC Class Codes: H04L 49/901 using storage descriptor, e.g. read or write pointers
• CPC Class Codes: H04L 49/9094 Arrangements for simultaneous transmit and receive, e.g. simultaneous reading/writing from/to the storage element
• CPC Class Codes: H04L 67/10 in which an application is distributed across nodes in the network software deployment G06F8/60; multiprogramming arrangements G06F9/46
• CPC Class Codes: H04L 69/12 Protocol engines
• CPC Class Codes: H04L 69/16 Implementation or adaptation of Internet protocol [IP], of transmission control protocol [TCP] or of user datagram protocol [UDP]
• CPC Class Codes: H04L 69/161 Implementation details of TCP/IP or UDP/IP stack architecture; Specification of modified or new header fields
• CPC Class Codes: H04L 69/162 involving adaptations of sockets based mechanisms secure socket layer H04L63/168
• CPC Class Codes: H04L 69/32 Architecture of open systems interconnection [OSI] 7-layer type protocol stacks, e.g. the interfaces between the data link level and the physical level
• CPC Class Codes: H04L 69/325 in the network layer [OSI layer 3], e.g. X.25 H04L69/16 takes precedence

Abstract

A data processing system arranged for receiving over a network, according to a data transfer protocol, data directed to any of a plurality of destination identities, the data processing system comprising: data storage for storing data received over the network; and a first processing arrangement for performing processing in accordance with the data transfer protocol on received data in the data storage, for making the received data available to respective destination identities; and a response former arranged for: receiving a message requesting a response indicating the availability of received data to each of a group of destination identities; and forming such a response; wherein the system is arranged to, in dependence on receiving the said message.

Claims

1. A signal handling method for a processor-based data processing system that has an operating system, an application having a signal handler configured to execute in response to an asynchronous signal from the operating system, and a library, the method comprising:

intercepting, at the library, an instruction sent from the application to the operating system, the instruction requesting registration, at the operating system, of the signal handler within the application to cause one or more asynchronous signals from the operating system to be sent to the signal handler;

modifying the instruction at the library so as to cause the one or more asynchronous signals from the operating system to be sent by the operating system to the library; and

in response to receiving a first asynchronous signal, of the one or more asynchronous signals, from the operating system received at the library and in response to determining by the library that a resource required for execution of the signal handler is not available, delaying passing said first asynchronous signal to the signal handler.

2. The method of claim 1, wherein the operating system is capable of being configured to automatically send an asynchronous signal, said asynchronous signal being configured to trigger execution by the signal handler of a signal handler routine.

3. The method of claim 2, further comprising in response to passing said first asynchronous signal to said signal handler, executing at the signal handler, the signal handler routine.

4. The method of claim 2, wherein said signal handler routine requires access to a resource.

5. The method of claim 4, wherein the resource is non-reentrant.

6. The method of claim 4, wherein determining by the library that a resource required for execution of the signal handler is not available comprises determining whether or not the resource is in use by the application or another application.

7. The method of claim 2, wherein determining by the library that a resource required for execution of the signal handler is not available comprises:

accessing, at the library, a memory location comprising one or more values.

8. The method of claim 7, wherein determining by the library that a resource required for execution of the signal handler is not available further comprises:

determining that said one or more values comprise an indicator that a second routine is currently being executed and a position in a stack indicating an address to which processing control is to return when the second routine is completed.

9. The method of claim 8, wherein the signal handler routine and the second routine both require access to the resource.

10. The method of claim 8, wherein further comprising, in response to determining by the library that the resource required for execution of the signal handler is not available, storing at said position in the stack an indicator of an address of a routine for signaling the signal handler routine to initiate execution thereof, whereby the signal handler routine is signaled to initiate execution in response to completion of the second routine.

11. The method of claim 8, further comprising, in response to completion of the second routine, modifying said one or more values to a new value such that in response to a second asynchronous signal from the operating system, said library passes said second asynchronous signal to said signal handler.

12. The method of claim 1, wherein the step of modifying the instruction at the library, includes causing a signal routine to be registered at the operating system instead of the signal handler within the application to cause the first asynchronous signal to be sent by the operating system to the library.

13. The method of claim 1, further comprising performing the step of passing of said signal to said signal handler if it is determined that the resource is available for execution of the signal handler.

14. The method of claim 1, further comprising passing said signal to said signal handler in response to determining, following the delaying, that the resource has become available.

15. A data processing system comprising:

a processor;

an operating system;

an application having a signal handler configured to execute in response to an asynchronous signal from the operating system; and

a library;

wherein said application is configured to send an instruction to the operating system to register, at the operating system, the signal handler within the application to cause one or more asynchronous signals from the operating system to be sent to the signal handler;

said library is configured to;

intercept and modify the instruction so as to cause the one or more asynchronous signals from the operating system to be sent by the operating system to the library; and

in response to receiving a first asynchronous signal, of the one or more asynchronous signals, from the operating system and determining with the library that a resource is not available for use by the signal handler, delay a pass of said first asynchronous signal to the signal handler.

16. The data processing system as claimed in claim 15, wherein the data processing system implements a user-level networking stack.

17. The data processing system as claimed in claim 16, wherein the user-level networking stack is implemented by means of the library.

18. One or more non-transitory computer readable media storing instructions that are executable by a data processing system that has an operating system, an application having a signal handler configured to execute in response to an asynchronous signal from the operating system, and a library, and upon such execution cause the data processing system to perform operations comprising:

intercepting, at the library, an instruction sent from the application to the operating system, the instruction requesting registration, at the operating system, of the signal handler within the application to cause one or more asynchronous signals from the operating system to be sent to the signal handler;

modifying the instruction at the library so as to cause the one or more asynchronous signals from the operating system to be sent by the operating system to the library; and

in response to receiving a first asynchronous signal, of the one or more asynchronous signals, from the operating system at the library and determining by the library that a resource is not available for use by the signal handler at a time of the determining, delaying passing said first asynchronous signal to the signal handler.