Testing systems that include digital signal processing systems

• US 10,445,203 B2
• Filed: 07/06/2017
• Issued: 10/15/2019
• Est. Priority Date: 07/06/2017
• Status: Active Grant

• Current Assignee: Sorenson Ip Holdings, LLC
• Original Assignee: Sorenson Ip Holdings, LLC
• Inventors: Bullough, Jeffrey
• Primary Examiner(s): Le, Dieu Minh T
• Application Number:
  US15/643,356
• Publication Number:
  US 20190012247A1
• Time in Patent Office: 831 Days
• Field of Search: 714 25, 714 30, 714 31, 714 32, 714 33, 714 37, 714703
• CPC Class Codes: G06F 11/2236 to test CPU or processors
• CPC Class Codes: G06F 11/26 Functional testing

Abstract

According to one or more aspects of the present disclosure, operations may include activating testing software of a digital signal processing system instead of activating operating software of the digital signal processing system. The testing software may be configured to, while activated, perform linear operations with respect to signals that traverse the signal path. The operating software may be configured to, while activated, perform non-linear operations with respect to signals that traverse the signal path. The testing software may be activated during testing of one or more hardware elements of the signal path that are configured to perform analog operations on signals that traverse the signal path.

Claims

1. A method of testing hardware, the method comprising:

activating, by a control system during testing of one or more analog hardware elements included in a signal path of an electronic device, testing software of a digital signal processing system that is included in the signal path of the electronic device, the testing software being configured to cause the digital signal processing system to perform linear operations with respect to signals that traverse the signal path;

deactivating, by the control system during the testing of the one or more analog hardware elements, operating software of the digital signal processing system, the operating software being configured to cause the digital signal processing system to perform non-linear operations with respect to signals that traverse the signal path; and

activating, by the control system, the operating software and deactivating the testing software in response to the testing of the one or more analog hardware elements finishing.

2. The method of claim 1, wherein activating the testing software and deactivating the operating software includes replacing the operating software with the testing software.

3. The method of claim 1, wherein activating the testing software and deactivating the operating software includes configuring the digital signal processing system such that the testing software performs operations with respect to signals that traverse the signal path and such that the operating software does not perform operations with respect to signals that traverse the signal path.

4. The method of claim 1, wherein activating the testing software and deactivating the operating software includes loading the testing software instead of loading the operating software.

5. The method of claim 1, wherein the signal path is a first signal path and wherein the method further comprises muting a second signal path during the testing of the one or more analog hardware elements.

6. The method of claim 5, wherein muting the second signal path includes activating muting software that nulls signals that traverse the second signal path.

7. The method of claim 5, wherein the first signal path is a communication session receive signal path and the second signal path is a communication session transmit signal path.

8. The method of claim 5, wherein the first signal path is a communication session transmit signal path and the second signal path is a communication session receive signal path.

9. A method of testing hardware of a system that performs digital signal processing, the method comprising:

activating, by a control system during testing of one or more first analog hardware elements included in a first signal path of an electronic device, first linear testing software of a first digital signal processing system included in the first signal path;

deactivating, by the control system during the testing of the one or more first analog hardware elements, first non-linear operating software of the first digital signal processing system; and

muting, by the control system during the testing of the one or more first analog hardware elements, a second digital signal processing system included in a second signal path of the electronic device, the muting nulls signals that traverse the second signal path and the second digital signal processing system being configured to perform operations with respect to signals that traverse the second signal path.

10. The method of claim 9, further comprising activating the first non-linear operating software and deactivating the first linear testing software in response to the testing of the one or more first analog hardware elements finishing.

11. The method of claim 9, further comprising, in response to the testing of the one or more first analog hardware elements finishing:

activating, by the control system during testing of one or more second analog hardware elements included in the second signal path, second linear testing software of the second digital signal processing system;

deactivating, by the control system during the testing of the one or more second analog hardware elements, second non-linear operating software of the second digital signal processing system; and

muting, by the control system during the testing of the one or more second analog hardware elements, the first digital signal processing system, the muting nulls signals that traverse the first signal path.

12. The method of claim 11, wherein the first linear testing software and the second linear testing software are the same code.

13. The method of claim 11, wherein the first non-linear operating software and the second non-linear operating software are the same code.

14. The method of claim 9, wherein the first digital signal processing system and the second digital signal processing system are a same digital signal processing system configured to perform digital signal processing with respect to signals that traverse the first signal path and the second signal path.

15. The method of claim 9, wherein muting the second digital signal processing system includes activating muting software in the second digital signal processing system that nulls signals that traverse the second signal path.

16. A system comprising:

a signal path;

one or more analog hardware elements included in the signal path;

a digital signal processing system included in the signal path;

one or more non-transitory computer-readable media configured to store one or more instructions; and

one or more processors communicatively coupled to the one or more computer-readable media and configured to, in response to executing the one or more instructions, cause performance of operations comprising;

activating, during testing of the one or more analog hardware elements, linear testing software of the digital signal processing system; and

deactivating, during the testing of the one or more analog hardware elements, non-linear operating software of the digital signal processing system.

17. The system of claim 16, wherein the operations further comprise:

determining that the testing of the one or more analog hardware elements with the linear testing software activated has finished; and

activating the non-linear operating software and deactivating the linear testing software in response to determining that the testing of the one or more analog hardware elements has finished.

18. The system of claim 16, wherein the operations further comprise activating the non-linear operating software and deactivating the linear testing software in response to the testing of the one or more analog hardware elements having finished.

19. The system of claim 16, wherein the digital signal processing system includes the one or more non-transitory computer-readable media and the one or more processors.

20. The system of claim 16, wherein the signal path is a first signal path, the system includes a second signal path, and the operations further comprise muting the second signal path during the testing of the one or more analog hardware elements.