Attack protection for valid gadget control transfers
First Claim
Patent Images
1. At least one non-transitory computer readable medium including instructions that when executed enable a system to:
- during execution of a process on a processor of the system and prior to a call to a function, store a first value in a first register of a plurality of registers of the processor, the first value comprising a random value;
responsive to a control transfer termination (CTT) instruction encountered after a control transfer operation that returns from the function, determine whether a current value of the first register equals the first value;
if so, continue execution of the process, and otherwise raise a violation; and
set a page to an execute only status, the page including the instructions to store the random value in the first register via immediate parameters.
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Abstract
In one embodiment, a processor comprises: a first register to store a first bound value for a stack to be stored in a memory; a second register to store a second bound value for the stack; a checker logic to determine, prior to an exit point at a conclusion of a function to be executed on the processor, whether a value of a stack pointer is within a range between the first bound value and the second bound value; and a logic to prevent a return to a caller of the function if the stack pointer value is not within the range. Other embodiments are described and claimed.
81 Citations
17 Claims
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1. At least one non-transitory computer readable medium including instructions that when executed enable a system to:
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during execution of a process on a processor of the system and prior to a call to a function, store a first value in a first register of a plurality of registers of the processor, the first value comprising a random value; responsive to a control transfer termination (CTT) instruction encountered after a control transfer operation that returns from the function, determine whether a current value of the first register equals the first value; if so, continue execution of the process, and otherwise raise a violation; and set a page to an execute only status, the page including the instructions to store the random value in the first register via immediate parameters. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. An apparatus comprising:
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a decode circuit to decode instructions; an execution circuit to execute at least some of the decoded instructions; a hardware stack to store return addresses; a plurality of registers; and wherein the execution circuit is to; during execution of a process and prior to a call to a function, store a first value in a first register of the plurality of registers, the first value comprising a random value; responsive to a control transfer termination (CTT) instruction encountered after a control transfer operation that returns from the function, determine whether a current value of the first register equals the first value; if so, continue execution of the process, and otherwise raise a violation, and set a page to an execute only status, the page including at least one instruction to store the random value in the first register via immediate parameters. - View Dependent Claims (11, 12, 13, 14)
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15. A method comprising:
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during execution of a process on a processor of a system and prior to a call to a function, storing a first value in a first register of a plurality of registers of the processor, the first value comprising a random value; responsive to a control transfer termination (CTT) instruction encountered after a control transfer operation that returns from the function, determining whether a current value of the first register equals the first value; if so, continuing execution of the process, and otherwise raising a violation; and setting a page to an execute only status, the page including at least one instruction to store the random value in the first register via immediate parameters. - View Dependent Claims (16, 17)
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Specification