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System and method for adaptively optimized refresh of memory

  • US 10,446,215 B1
  • Filed: 11/16/2016
  • Issued: 10/15/2019
  • Est. Priority Date: 11/16/2016
  • Status: Active Grant
First Claim
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1. A system for adaptive refresh of a memory device having multiple integrated circuit chips, the system comprising:

  • a command generation portion executable to generate commands for actuating a plurality of operational tasks on the memory device, the operational tasks including at least read, write, and refresh operations for selectively addressed storage cells of the memory device, each chip of the memory device defining a plurality of banks, the storage cells of each bank being organized in a plurality of individually accessible pages;

    a command management portion coupled to said command generation portion, said command management portion including;

    a command queue unit storing the commands for operational tasks on the memory device awaiting execution; and

    ,an execution strategy unit coupled to said command queue unit for selecting the commands stored in said command queue unit for timely execution of corresponding operational tasks on the memory device; and

    ,a refresh management portion coupled to said command generation and command management portions for scheduling actuation of a plurality of refresh operations to be adaptively interleaved with other operational tasks, wherein full recursive refresh of the storage cells is carried out for the memory device within a predetermined refresh window of time, said refresh management portion including;

    a chip refresh unit executable to selectively actuate each refresh operation for a chip-based selection of storage cells, a refresh request for a selected chip actuating a series of refresh operations to collectively refresh the storage cells of the selected chip, whereby for each refresh request for a selected chip the storage cells in all banks of the selected chip are collectively refreshed by the series of refresh operations exclusive of actuation of other operational tasks directed to the selected chip, anda bank refresh unit executable to selectively actuate each refresh operation for a bank-based selection of storage cells, whereby the storage cells in a selected bank are refreshed, the bank refresh unit having an enable/disable input controllable by the chip refresh unit, whereby the chip refresh unit can enable and disable the bank refresh unit to adaptively adjust the granularity of the refresh operation of the memory device according to three zones of operation, the zones including;

    a first zone in which the bank refresh unit is enabled and a memory-chip-based auto refresh is disabled,a second zone in which the bank refresh unit is disabled and the memory-chip-based auto refresh is enabled, anda third zone in which the bank refresh unit is enabled and a memory-chip-based auto refresh is enabled only upon determination that the bank refresh unit is unable to refresh the bank-based selection of storage cells within a required refresh time,wherein the memory-chip-based auto refresh is executed by the chip refresh unit to maintain the refresh request count relative to an average periodic refresh interval time parameter and refresh time debit/credit information associated therewith for the chip-based selection of storage cells.

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