Method for maximizing power efficiency in memory interface block

• US 10,446,254 B1
• Filed: 05/03/2018
• Issued: 10/15/2019
• Est. Priority Date: 05/03/2018
• Status: Active Grant

• Current Assignee: JP Morgan Chase Bank, N.A. (JP Morgan Chase & Co)
• Original Assignee: Western Digital Technologies Incorporated (Western Digital Corporation)
• Inventors: Zehavi, Mordekhay, Asfur, Mahmud, Tzafrir, Yonatan
• Primary Examiner(s): Tran, Michael T
• Application Number:
  US15/970,832
• Publication Number:
  US 20190341120A1
• Time in Patent Office: 530 Days
• Field of Search: 365201, 365189011
• CPC Class Codes: G06F 11/0727 in a storage system, e.g. in a DASD or network based storage system drivers for digital recording or reproducing units G06F3/06; circuits for error detection or correction within digital recording or reproducing units G11B20/18; for distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS], H04L67/1097
• CPC Class Codes: G06F 11/0754 by exceeding limits
• CPC Class Codes: G06F 11/0796 Safety measures, i.e. ensuring safe condition in the event of error, e.g. for controlling element
• CPC Class Codes: G06F 11/1048 using arrangements adapted for a specific error detection or correction feature
• CPC Class Codes: G06F 11/3037 where the computing system component is a memory, e.g. virtual memory, cache accessing, addressing or allocating within memory systems or architectures G06F12/00; checking stores for correct operation G11C29/00
• CPC Class Codes: G06F 11/3062 where the monitored property is the power consumption power management in a computing system G06F1/3203
• CPC Class Codes: G11C 2029/0409 Online test
• CPC Class Codes: G11C 2029/5004 Voltage
• CPC Class Codes: G11C 29/028 with adaption or trimming of parameters
• CPC Class Codes: G11C 29/50 Marginal testing, e.g. race, voltage or current testing
• CPC Class Codes: G11C 7/04 with means for avoiding disturbances due to temperature effects

Abstract

A data storage device includes a controller and a memory. The controller includes a host interface and a memory interface. The controller writes a first data test to a memory device through either the host interface or the memory interface at a first voltage level to determine a first write value. The controller reads the first data test written to the memory device through the same interface, either the host interface or the memory interface, at a second voltage level to determine a first read value. The controller then changes the second voltage to a third voltage based on a determination of whether the first read value is equal to the first write value to dynamically alter a working voltage level of the storage device in response to changing process, voltage, and temperature conditions.

Claims

1. A method for monitoring voltage impact of a read operation of a storage device, comprising:

initializing a system of the storage device with a first voltage level, wherein the storage device comprises a controller and one or more memory devices, and wherein the controller comprises a host interface and a memory interface;

writing, by the controller, a first data test to a first memory device of the one or more memory devices at a second voltage level through the host interface, wherein the second voltage level is a write value of the controller;

reading, by the controller, the first data test at a third voltage level through the host interface, wherein the third voltage level is a read value, and wherein the third voltage level is lower than the second voltage level;

determining whether the read value is equal to the write value;

determining whether the third voltage level is the same as a predetermined minimum voltage level for the host interface if the read value equals the write value; and

decreasing the third voltage level to a fourth voltage level supplied to the system if the third voltage level is not the same as the predetermined minimum voltage level to dynamically alter a working voltage level of the storage device in response to changing process, voltage, and temperature conditions.

2. The method of claim 1, wherein the writing of the first data test occurs during a defined interval timeframe.

3. The method of claim 1, wherein the read value being equal to the write value indicates the system can be operated at the fourth voltage level, the fourth voltage level being lower than the second voltage level.

4. The method of claim 3, further comprising:

repeating;

writing, by the controller, the first data test to the first memory device of the one or more memory device at the second voltage level through the host interface, wherein the second voltage level is the write value of the controller;

reading, by the controller, the first data test at the third voltage level through the host interface, wherein the third voltage level is the read value, and wherein the third voltage level is lower than the second voltage level;

determining whether the read value is equal to the write value;

determining whether the third voltage level is the same as a predetermined minimum voltage level of the system if the read value equals the write value; and

decreasing the third voltage level to a fourth voltage level supplied to the system if the third voltage level is not the same as the predetermined minimum voltage level for the host interface to gradually lower the fourth voltage level.

5. The method of claim 4, wherein the fourth voltage level is equal to or greater than the predetermined minimum voltage level.

6. The method of claim 1, further comprising:

increasing the third voltage level to a fifth voltage level supplied to the system if the read value is not equal to the write value.

7. The method of claim 6, wherein the fifth voltage level is the altered working voltage level of the system.

8. The method of claim 7, wherein the fifth voltage level is equal to or greater than the predetermined minimum voltage level.

9. The method of claim 1, wherein the third voltage level remains unaltered if the third voltage level is the same as the predetermined minimum voltage level.

10. A method for monitoring voltage impact of a write operation of a storage device, comprising:

initializing a system of the storage device with a first voltage level, wherein the storage device comprises a controller and one or more memory devices, and wherein the controller comprises a memory interface and a host interface;

writing, by the controller, a first data test to a first memory device of the one or more memory devices at a second voltage level through the memory interface, wherein the second voltage level is a write value;

reading, by the controller, the first data test at a third voltage level through the memory interface, wherein the third voltage level is a read value, and wherein the third voltage level is higher than the second voltage level;

determining whether the read value is equal to the write value; and

increasing the third voltage level to a fourth voltage level supplied to the system if the read value is not equal the write value to dynamically alter a working voltage level of the storage device in response to changing process, voltage, and temperature conditions.

11. The method of claim 10, wherein the writing of the first data test occurs during idle interrupt of the system.

12. The method of claim 10, wherein the read value not being equal to the write value indicates a risk of a setup/hold violation of the system.

13. The method of claim 10, wherein the fourth voltage level is the altered working voltage level.

14. The method of claim 10, wherein the first voltage level is a nominal voltage level.

15. The method of claim 10, further comprising:

decreasing the third voltage level to a fifth voltage level supplied to the system if the read value is equal to the write value.

16. A data storage device, comprising:

one or more memory devices; and

a controller having a first interface and a second interface, the controller configured to write a first data test to a first memory device of the one or more memory devices through the first interface of the controller at a first voltage level, wherein the first voltage level is a first write value;

the controller further configured to read the first data test written to the first memory device through the first interface at a second voltage level, wherein the second voltage level is a first read value; and

the controller further configured to change the second voltage level to a third voltage level based on a determination of whether the first read value is equal to the first write value to dynamically alter a working voltage level of the storage device in response to changing process, voltage, and temperature conditions.

17. The data storage device of claim 16, wherein the third voltage level is lower than the second voltage level if the controller determines the first read value is equal to the first write value.

18. The data storage device of claim 16, wherein the third voltage level is higher than the second voltage level if the controller determines the first read value is not equal to the first write value.

19. The data storage device of claim 16, wherein the first interface is a host interface and the second interface is a memory interface, and wherein the first voltage level is higher than the second voltage level.

20. The data storage device of claim 16, wherein the controller is further configured to write a second data test to the first memory device through the second interface at a fifth voltage level, wherein the fifth voltage level is a second write value, to read the second data test written to the first memory device through the second interface at a sixth voltage level, wherein the sixth voltage level is a second read value, and to change the sixth voltage level to a seventh voltage level based on a determination of whether the second read value is equal to the second write value, wherein the seventh voltage level is the altered working voltage level.

21. The data storage device of claim 20, wherein the first interface is a host interface and the second interface is a memory interface.

22. The data storage device of claim 20, wherein the fifth voltage level is lower than the sixth voltage level.

23. The data storage device of claim 20, wherein the controller is further configured to alternate writing and reading the first data test through the first interface and the second data test through the second interface.

24. A data storage system, comprising:

a host device; and

a storage device coupled to the host device, the storage device including;

a controller having a host interface coupled to the host device and a memory interface coupled to one or more memory devices, wherein the controller is configured to write a first data test to a first memory device of the one or more memory devices through the host interface at a first voltage level, wherein the first voltage level is a write value, and to read the first data test written to the first memory device through the host interface at a second voltage level, wherein the second voltage level is a read value, wherein the controller is further configured to compare the read value to the write value and to dynamically alter a working voltage level of the system based on a determination of whether the read value is equal to the write value.

25. The data storage system of claim 24, wherein the working voltage level is lower than the first voltage level.