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Semiconductor device and method of forming a PoP device with embedded vertical interconnect units

  • US 10,446,479 B2
  • Filed: 11/08/2017
  • Issued: 10/15/2019
  • Est. Priority Date: 03/23/2012
  • Status: Active Grant
First Claim
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1. A semiconductor device, comprising:

  • a substrate including a conductive via formed through the substrate;

    a plurality of first vertical interconnect structures disposed over the substrate;

    a plurality of second vertical interconnect structures disposed over a first portion of the plurality of first vertical interconnect structures;

    a first semiconductor die disposed over a second portion of the plurality of first vertical interconnect structures and adjacent to the plurality of second vertical interconnect structures; and

    an encapsulant deposited around the first semiconductor die and around the plurality of first vertical interconnect structures and around the plurality of second vertical interconnect structures with an opening in the encapsulant extending to the plurality of second vertical interconnect structures.

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