×

Package on package with integrated passive electronics method and apparatus

  • US 10,446,533 B2
  • Filed: 09/29/2017
  • Issued: 10/15/2019
  • Est. Priority Date: 09/29/2017
  • Status: Active Grant
First Claim
Patent Images

1. A method of fabricating a multi-package integrated circuit comprising:

  • forming a bottom circuit package, including providing a bottom circuit package substrate, placing a first integrated circuit on the substrate;

    disposing a mold compound layer on the substrate to encapsulate the first integrated circuit; and

    disposing first and second void structures in the mold compound layer, wherein the first and second void structures have first and second heights, wherein the first height is greater than the second height, wherein forming the bottom circuit package further includes disposing a conductor via through the mold compound layer, including forming the conductor via with vertical sidewalls in the mold compound, and filling the conductor via with a conductive material;

    forming a top circuit package, including providing a top circuit package substrate;

    disposing a second integrated circuit in a die side layer of the top circuit package substrate; and

    disposing first and second passive electrical components on an interface side of the top package substrate to match the disposition of the first and second void structures of the bottom package substrate, wherein the first and second passive electrical components have first and second component heights that respectively match the first and second heights of the first and second void structures, wherein the first component height is greater than the second component height; and

    mounting the top circuit package to the bottom circuit package, including inserting the first and second passive electrical components in the first and second void structures respectively; and

    electrically coupling the bottom circuit package to the interface side of the top circuit package substrate, wherein the conductor via with vertical sidewalls provides at least a part of the electrical coupling between the top and bottom circuit packages.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×