Enhancement-mode/depletion-mode field-effect transistor GAN technology
First Claim
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1. An integrated circuit die comprising:
- a substrate;
a first device stack disposed upon the substrate; and
a second device stack spaced from the first device stack and disposed upon the substrate, the second device stack comprising;
a first portion of a channel layer; and
a threshold voltage shift layer disposed between the first portion of the channel layer portion and the substrate, wherein the threshold voltage shift layer is configured to set a first threshold voltage that is a minimum device control voltage required to create a conducting path within the first portion of the channel layer, wherein the threshold voltage shift layer is made of a first semiconductor material having a first bandgap that is higher than a second bandgap of a second semiconductor material making up the channel layer.
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Abstract
An integrated circuit die having a substrate with a first device stack disposed upon the substrate and a second device stack spaced from the first device stack and disposed upon the substrate is disclosed. The second device stack includes a first portion of a channel layer and a threshold voltage shift layer disposed between the first portion of the channel layer and the substrate, wherein the threshold voltage shift layer is configured to set a threshold voltage that is a minimum device control voltage required to create a conducting path within the first portion of the channel layer.
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Citations
24 Claims
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1. An integrated circuit die comprising:
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a substrate; a first device stack disposed upon the substrate; and a second device stack spaced from the first device stack and disposed upon the substrate, the second device stack comprising; a first portion of a channel layer; and a threshold voltage shift layer disposed between the first portion of the channel layer portion and the substrate, wherein the threshold voltage shift layer is configured to set a first threshold voltage that is a minimum device control voltage required to create a conducting path within the first portion of the channel layer, wherein the threshold voltage shift layer is made of a first semiconductor material having a first bandgap that is higher than a second bandgap of a second semiconductor material making up the channel layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A method of fabricating an integrated circuit die comprising:
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providing a substrate; disposing a buffer layer over the substrate; disposing a threshold voltage shift layer over the buffer layer to a predetermined thickness; masking the threshold voltage shift layer with an etch mask to define a first device stack location; etching through the threshold voltage shift layer not masked by the etch mask to create an exposed portion of the buffer layer; removing the etch mask to expose a non-etched portion of the threshold voltage shift layer; disposing a channel layer over the exposed portion of the buffer layer and the non-etched portion of the threshold voltage shift layer, wherein the threshold voltage shift layer is configured to set a first threshold voltage that is a minimum device control voltage required to create a conducting path within a portion of the channel layer residing over the non-etched portion of the threshold voltage shift layer. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24)
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Specification