Semiconductor device
First Claim
Patent Images
1. A semiconductor device comprising:
- a semiconductor layer;
a first electrode, a second electrode, and a third electrode over the semiconductor layer, wherein the second electrode is between the first electrode and the third electrode;
a first insulating film over the first electrode, the second electrode, and the third electrode;
a first wiring overlapping the first electrode with the first insulating film therebetween;
a second wiring overlapping the semiconductor layer with the first insulating film therebetween, in a first region between the first electrode and the second electrode;
a third wiring overlapping the semiconductor layer with the first insulating film therebetween, in a second region between the second electrode and the third electrode;
a fourth wiring overlapping the third electrode with the first insulating film therebetween;
a second insulating film over the first wiring, the second wiring, the third wiring, and the fourth wiring; and
a fifth wiring over the second insulating film and electrically connected to the second electrode through a contact hole in the second insulating film,wherein the first wiring, the second wiring, the third wiring, and the fourth wiring are parallel to one another, andwherein the fifth wiring is perpendicular to the first wiring.
1 Assignment
0 Petitions
Accused Products
Abstract
To provide a semiconductor memory device which can be manufactured with high yield and which can achieve higher integration. A pair of memory cells adjacent to each other in the bit line direction is connected to a bit line through a common contact hole. The pair of memory cells adjacent to each other in the bit line direction shares an electrode connected to the bit line. An oxide semiconductor layer included in the memory cell is provided to overlap with a word line and a capacitor line. A transistor and a capacitor included in the memory cell are each provided to overlap with the bit line connected to the memory cell.
-
Citations
20 Claims
-
1. A semiconductor device comprising:
-
a semiconductor layer; a first electrode, a second electrode, and a third electrode over the semiconductor layer, wherein the second electrode is between the first electrode and the third electrode; a first insulating film over the first electrode, the second electrode, and the third electrode; a first wiring overlapping the first electrode with the first insulating film therebetween; a second wiring overlapping the semiconductor layer with the first insulating film therebetween, in a first region between the first electrode and the second electrode; a third wiring overlapping the semiconductor layer with the first insulating film therebetween, in a second region between the second electrode and the third electrode; a fourth wiring overlapping the third electrode with the first insulating film therebetween; a second insulating film over the first wiring, the second wiring, the third wiring, and the fourth wiring; and a fifth wiring over the second insulating film and electrically connected to the second electrode through a contact hole in the second insulating film, wherein the first wiring, the second wiring, the third wiring, and the fourth wiring are parallel to one another, and wherein the fifth wiring is perpendicular to the first wiring. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
-
-
11. A semiconductor device comprising:
-
a first transistor comprising a first gate electrode and a first electrode functions as a source or drain electrode of the first transistor; and a second transistor comprising second gate electrode and a second electrode functions as a source or drain of the second transistor, wherein; the first transistor and the second transistor comprises; a common oxide semiconductor layer comprising a channel formation region of the first transistor and a channel formation region of the second transistor, wherein an entire bottom surface of the common oxide semiconductor layer is in contact with an insulating surface; and a common electrode over and in contact with the common oxide semiconductor layer, wherein the common electrode functions as a source or drain electrode of the first transistor and the second transistor and is positioned between the channel formation region of the first transistor and the channel formation region of the second transistor, the first gate electrode is positioned between the first electrode and the common electrode; and the second gate electrode is positioned between the second electrode and the common electrode. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20)
-
Specification