Semiconductor device and method of manufacturing the same
First Claim
1. A semiconductor device comprising:
- a well region provided on a surface layer of a semiconductor substrate;
a source region and a drain region disposed to be distant from each other on a surface layer of the well region;
a channel region provided between the source region and the drain region; and
a gate electrode provided over the channel region with a gate insulator interposed between the gate electrode and the channel region,wherein a gate length of the gate electrode is 1.5 μ
m or less,the channel region includes indium as a channel impurity,a distance between a surface of the channel region and a concentration peak position of the channel impurity is 20 nm to 70 nm,a concentration of the channel impurity gradually decreases in a direction from the concentration peak position of the channel impurity to the surface of the channel region, andthe semiconductor device is an n-channel MOSFET.
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Accused Products
Abstract
A semiconductor device 1 includes: a well region 5 provided on a surface layer of a semiconductor substrate 2; a source region 14S and a drain region 15D disposed to be distant from each other on the surface layer of the well region 5; a channel region 6 provided between the source region 14S and the drain region 15D; and a gate electrode 8 provided over the channel region 6 with a gate insulator 7 interposed therebetween. A gate length of the gate electrode 8 is 1.5 μm or less, the channel region 6 includes indium as a channel impurity, a distance between a surface of the channel region 6 and a concentration peak position of the channel impurity is 20 nm to 70 nm, and a concentration of the channel impurity gradually decreases in a direction from the concentration peak position of the channel impurity to the surface of the channel region.
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Citations
11 Claims
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1. A semiconductor device comprising:
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a well region provided on a surface layer of a semiconductor substrate; a source region and a drain region disposed to be distant from each other on a surface layer of the well region; a channel region provided between the source region and the drain region; and a gate electrode provided over the channel region with a gate insulator interposed between the gate electrode and the channel region, wherein a gate length of the gate electrode is 1.5 μ
m or less,the channel region includes indium as a channel impurity, a distance between a surface of the channel region and a concentration peak position of the channel impurity is 20 nm to 70 nm, a concentration of the channel impurity gradually decreases in a direction from the concentration peak position of the channel impurity to the surface of the channel region, and the semiconductor device is an n-channel MOSFET. - View Dependent Claims (2, 3, 4)
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5. A method of manufacturing a semiconductor device comprising:
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ion-implanting a well impurity into a surface layer of a semiconductor substrate; implanting an indium ion as a channel impurity into the surface layer of the semiconductor substrate; performing a first heat treatment on the semiconductor substrate into which the well impurity and the indium ion have been implanted; forming a gate insulator on the surface layer of the semiconductor substrate on which the first heat treatment has been performed; forming a polysilicon film on the gate insulator; performing a second heat treatment on the semiconductor substrate on which the polysilicon film has been formed after the formation of the polysilicon film; and forming a gate electrode having a gate length of 1.5 μ
m or less by ion-implanting a gate impurity into the polysilicon film, patterning the polysilicon film, and performing a third heat treatment on the semiconductor substrate. - View Dependent Claims (6, 7, 8, 9, 10, 11)
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Specification