Magnetic tunnel junction wafer adaptor used in magnetic annealing furnace and method of using the same
First Claim
1. A planar wafer adaptor comprises:
- a planar body;
a first cutout from the planar body;
a first boundary having a perimeter contour substantially equivalent to a semiconductor wafer of a first dimension;
a second boundary along said first cutout and having a perimeter contour substantially equivalent to a semiconductor wafer of a second dimension; and
a lateral step disposed along said second boundary and configured to support an edge of said semiconductor wafer of said second dimension and configured to align said semiconductor wafer of said second dimension in a horizontal orientation when said planar body is aligned horizontally, wherein said planar body has a thermal mass that is substantially equal to a thermal mass of a semiconductor wafer of said first dimension minus an expected thermal mass of said semiconductor wafer of said second dimension.
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Accused Products
Abstract
Semiconductor substrate adaptor configured to adapt a substrate of a first dimension to a second dimension, such that the substrate can be properly supported by a supporting mechanism (e.g., a wafer cassette) customized for substrates of the second dimension. The substrate adaptor may be made of quartz. The combination of the substrate adaptor and a substrate fitting therein causes no perturbation in various aspects of a semiconductor process. Therefore, the substrate adaptor conveniently enables a substrate of the first dimension to be processed in the same processing equipment and conditions as a substrate of the second dimension. A vertical substrate adaptor may have a semicircular body with a semicircular cutout for accommodating a wafer and can support a wafer vertically. A horizontal substrate adaptor may have a circular body with a circular cutout for accommodating an entire wafer and supporting the wafer horizontally.
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Citations
22 Claims
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1. A planar wafer adaptor comprises:
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a planar body; a first cutout from the planar body; a first boundary having a perimeter contour substantially equivalent to a semiconductor wafer of a first dimension; a second boundary along said first cutout and having a perimeter contour substantially equivalent to a semiconductor wafer of a second dimension; and a lateral step disposed along said second boundary and configured to support an edge of said semiconductor wafer of said second dimension and configured to align said semiconductor wafer of said second dimension in a horizontal orientation when said planar body is aligned horizontally, wherein said planar body has a thermal mass that is substantially equal to a thermal mass of a semiconductor wafer of said first dimension minus an expected thermal mass of said semiconductor wafer of said second dimension. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A planar wafer holder comprising:
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a planar body having a perimeter contour substantially equivalent to a semiconductor wafer of a first dimension; a first cutout from the planar body and having a perimeter contour substantially equivalent to a semiconductor wafer of a second dimension that is smaller than said first dimension, a step disposed along said first cutout and configured to;
receive an edge of said semiconductor wafer of said second dimension; and
hold said semiconductor wafer of said second dimension in a cassette configured to contain semiconductor wafers of said first dimension, wherein a weight of said planar wafer holder in combination with said semiconductor wafer of said second dimension is substantially equal to a weight of a semiconductor wafer of said first dimension. - View Dependent Claims (14, 15, 16, 17, 18, 19)
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20. A method of processing semiconductor wafers in a processing apparatus, said method comprising:
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calibrating a heating system of said processing apparatus based on a thermal load of a semiconductor wafer of a first dimension; providing a semiconductor wafer of a second dimension that is smaller than said first dimension; providing a substrate adaptor configured to horizontally support said semiconductor wafer of said second dimension, wherein said substrate adaptor comprises; a planar body having a perimeter contour substantially equivalent to a semiconductor wafer of said first dimension; a first cutout from the planar body and having a perimeter contour substantially equivalent to said semiconductor wafer of said second dimension that is smaller than said first dimension; and a step disposed along said first cutout and configured to hold said semiconductor wafer of said second dimension in a cassette configured to contain semiconductor wafers of said first dimension, placing said semiconductor wafer of said second dimension onto said step to fit in said first cutout; loading said semiconductor wafer of said second dimension with said substrate adaptor into a cassette configured to contain a semiconductor wafer of said first dimension; loading said cassette containing said semiconductor wafer of said second dimension with said substrate adaptor to said processing apparatus; and processing said semiconductor wafer of said second dimension in said processing apparatus in a horizontal orientation. - View Dependent Claims (21, 22)
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Specification