Method and apparatus for controlling delay in a device for transporting packets over optical transport network

• US 10,447,418 B2
• Filed: 07/30/2018
• Issued: 10/15/2019
• Est. Priority Date: 06/06/2017
• Status: Active Grant

• Current Assignee: Aimvalley B.V.
• Original Assignee: Aimvalley B.V.
• Inventors: Bosch, Willem Van Den
• Primary Examiner(s): Dobson, Daniel G
• Application Number:
  US16/048,582
• Publication Number:
  US 20180367232A1
• Time in Patent Office: 442 Days
• CPC Class Codes: H04B 10/25 Arrangements specific to fibre transmission
• CPC Class Codes: H04B 10/40 Transceivers
• CPC Class Codes: H04J 2203/0085 Support of Ethernet
• CPC Class Codes: H04J 3/0638 Clock or time synchronisation among nodes; Internode synchronisation synchronization for ring networks H04L12/422; data switching networks with synchronous transmission H04L12/43
• CPC Class Codes: H04J 3/0655 using timestamps
• CPC Class Codes: H04J 3/0682 by delay compensation, e.g. by compensation of propagation delay or variations thereof, by ranging
• CPC Class Codes: H04J 3/07 using pulse stuffing for systems with different or fluctuating information rates or bit rates
• CPC Class Codes: H04J 3/16 in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted H04J3/17, H04J3/24 take precedence
• CPC Class Codes: H04J 3/1652 Optical Transport Network [OTN]
• CPC Class Codes: H04Q 2011/0088 Signalling aspects

Abstract

A method and apparatus for controlling delay over a data path in a device for transporting Ethernet packets over an optical transport network. The device is configured to receive an incoming clock signal having a first frequency and an incoming data signal and to output an outgoing clock signal having a second frequency and an outgoing data signal. One or more delays over the data path in the device are measured in a predetermined measurement period. A phase adjustment amount is determined based on the one or more measured delays over the data path in the predetermined measurement period, and based on the determining phase adjustment amount, a phase of the outgoing clock signal is adjusted by a phase locked loop in such a way that the delay over the data path in the device is substantially equal to a fixed delay value.

Claims

1. A method of controlling a delay over a fixed deterministic data path in a device for transporting packets over an optical network, the method comprising adjusting a phase of an outgoing clock signal based on a phase adjustment amount that is determined using one or more measured delays over the data path, such that the data path in the device is substantially equal to a fixed delay value.

2. The method according to claim 1, wherein adjusting the phase of the outgoing clock signal comprises adjusting a phase locked loop by either decreasing or increasing a phase of an incoming signal.

3. The method according to claim 1, wherein the fixed delay value comprises an average delay over the data path in the device, or a delay mid-point value between a minimum measured delay and a maximum measured delay over the data path in the device for a predetermined measurement period.

4. The method according to claim 1, wherein adjusting the phase of the outgoing clock signal comprises steering the phase of the outgoing clock signal based on stuff indication information.

5. The method according to claim 1, wherein the device is configured to receive an incoming data signal and output an outgoing data signal.

6. The method according to claim 5, wherein the incoming data signal comprises an Ethernet client signal or an optical transport network signal.

7. The method according to claim 6, wherein the outgoing data signal comprises an Ethernet client signal or an optical transport network signal.

8. The method according to claim 1, wherein adjusting the phase of the outgoing clock signal comprises steering a phase of the phase locked loop based on:

(i) a number of client data bits in an incoming data signal and a latency in the data path in the device, or (ii) a number of data bits to be inserted in an outgoing data signal.

9. The method according to claim 1, wherein adjusting the phase of the outgoing clock signal comprises adding additional de-mapping information to adjust an output frequency of a phase of the phase locked loop in such a way that the delay in the data path in the device is substantially equal to the fixed delay value.

10. The method according to claim 1, further comprising steering a phase of a client signal based on an additional number of mapping data bits in a server data signal to control a latency of a client data path in the device.

11. The method according to claim 1, wherein adjusting the phase of the outgoing clock signal comprises adding additional mapping information to adjust an output frequency of a phase locked loop in such a way that the delay in the data path in the device is substantially equal to the fixed delay value.

12. An apparatus for controlling a delay over a fixed deterministic data path in a device for transporting packets over an optical network, the apparatus comprising:

means for adjusting a phase of an outgoing clock signal based on a phase adjustment amount that is determined using one or more measured delays over the data path, such that the data path in the device is substantially equal to a fixed delay value.

13. The apparatus according to claim 12, wherein the means for adjusting the phase of the outgoing clock signal comprises means for adjusting a phase locked loop by either decreasing or increasing a phase of an incoming signal.

14. The apparatus according to claim 12, wherein the fixed delay value comprises an average delay over the data path in the device, or a delay mid-point value between a minimum measured delay and a maximum measured delay over the data path in the device for a predetermined measurement period.

15. The apparatus according to claim 12, wherein the means for adjusting the phase of the outgoing clock signal comprises means for steering the phase of the outgoing clock signal based on stuff indication information.

16. The apparatus according to claim 12, wherein the device is configured to receive an incoming data signal and output an outgoing data signal, the incoming data signal comprising an Ethernet client signal or an optical transport network signal.

17. The apparatus according to claim 12, wherein the means for adjusting the phase of the outgoing clock signal comprises the means for steering a phase of the phase locked loop based on:

(i) a number of client data bits in an incoming data signal and a latency in the data path in the device, or (ii) a number of data bits to be inserted in an outgoing data signal.

18. The apparatus according to claim 12, wherein the means for adjusting the phase of the outgoing clock signal comprises means for adding additional de-mapping information to adjust an output frequency of a phase of the phase locked loop in such a way that the delay in the data path in the device is substantially equal to the fixed delay value.

19. The apparatus according to claim 12, further comprising means for steering a phase of a client signal based on an additional number of mapping data bits in a server data signal to control a latency of a client data path in the device.