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Scheduler for vector processing operator allocation

  • US 10,452,449 B1
  • Filed: 05/10/2017
  • Issued: 10/22/2019
  • Est. Priority Date: 05/01/2017
  • Status: Active Grant
First Claim
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1. An apparatus comprising:

  • a plurality of hardware engines configured to process a plurality of vectors using a plurality of operators; and

    a scheduler circuit configured to (i) parse a directed acyclic graph into one or more of said operators, (ii) track a plurality of first status signals indicating a readiness state of a plurality of unscheduled operators that have not been allocated to said hardware engines, (iii) track a plurality of second status signals indicating a readiness state of said hardware engines, and (iv) for each operator, track a resource type parameter, a priority parameter, and an offset parameter; and

    an operator allocation circuit implemented solely in hardware and configured to (a) select a resource type from a list of resource types in use, (b) determine available hardware engines corresponding to the selected resource type based on the second status signals, (c) generate scores for the unscheduled operators based on (i) the selected resource type, (ii) the first status signals, (iii) the resource type parameters, (iv) the priority parameters, and (v) the offset parameters, and (d) allocate at least one of said unscheduled operators to at least one of said available hardware engines based on said scores.

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