Scheduler for vector processing operator allocation
First Claim
1. An apparatus comprising:
- a plurality of hardware engines configured to process a plurality of vectors using a plurality of operators; and
a scheduler circuit configured to (i) parse a directed acyclic graph into one or more of said operators, (ii) track a plurality of first status signals indicating a readiness state of a plurality of unscheduled operators that have not been allocated to said hardware engines, (iii) track a plurality of second status signals indicating a readiness state of said hardware engines, and (iv) for each operator, track a resource type parameter, a priority parameter, and an offset parameter; and
an operator allocation circuit implemented solely in hardware and configured to (a) select a resource type from a list of resource types in use, (b) determine available hardware engines corresponding to the selected resource type based on the second status signals, (c) generate scores for the unscheduled operators based on (i) the selected resource type, (ii) the first status signals, (iii) the resource type parameters, (iv) the priority parameters, and (v) the offset parameters, and (d) allocate at least one of said unscheduled operators to at least one of said available hardware engines based on said scores.
2 Assignments
0 Petitions
Accused Products
Abstract
An apparatus includes a plurality of hardware engines and a scheduler circuit. The hardware engines may be configured to process a plurality of vectors using a plurality of operators. The scheduler circuit may be configured to (i) parse a directed acyclic graph into one or more of the operators, (ii) track a plurality of unscheduled operators that have not been allocated to the hardware engines, (iii) track a plurality of statuses of the hardware engines and (iv) allocate at least one of the unscheduled operators to at least one of the hardware engines based on the statuses. The at least one unscheduled operator may be processed in the at least one hardware engine. The scheduler circuit may be implemented solely in hardware.
-
Citations
20 Claims
-
1. An apparatus comprising:
-
a plurality of hardware engines configured to process a plurality of vectors using a plurality of operators; and a scheduler circuit configured to (i) parse a directed acyclic graph into one or more of said operators, (ii) track a plurality of first status signals indicating a readiness state of a plurality of unscheduled operators that have not been allocated to said hardware engines, (iii) track a plurality of second status signals indicating a readiness state of said hardware engines, and (iv) for each operator, track a resource type parameter, a priority parameter, and an offset parameter; and an operator allocation circuit implemented solely in hardware and configured to (a) select a resource type from a list of resource types in use, (b) determine available hardware engines corresponding to the selected resource type based on the second status signals, (c) generate scores for the unscheduled operators based on (i) the selected resource type, (ii) the first status signals, (iii) the resource type parameters, (iv) the priority parameters, and (v) the offset parameters, and (d) allocate at least one of said unscheduled operators to at least one of said available hardware engines based on said scores. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
-
-
12. A method for allocating operators, comprising the steps of:
-
parsing a directed acyclic graph into one or more operators using a scheduler circuit comprising an operator allocation circuit implemented solely in hardware; tracking a plurality of first status signals indicating a readiness state of a plurality of unscheduled operators that have not been allocated to a plurality of hardware engines; tracking a plurality of second status signals indicating a readiness state of said hardware engines; tracking a resource type parameter, a priority parameter, and an offset parameter for each operator; utilizing said operator allocation circuit to (a) select a resource type from a list of resource types in use, (b) determine available hardware engines corresponding to the selected resource type based on the plurality of second status signals, (c) generate scores for the unscheduled operators based on (i) the selected resource type, (ii) the plurality of first status signals, (iii) the resource type parameters, (iv) the priority parameters, and (v) the offset parameters, and (d) allocate at least one of said unscheduled operators to at least one of said available hardware engines based on said scores; and processing a plurality of vectors in said hardware engines using said operators. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19, 20)
-
Specification