Memory-mapped interface for message passing computing systems
First Claim
1. A system comprising:
- a neural network processor system, comprising at least one neural network processing core interconnected by a network; and
an interface operatively connected to the network, the interface comprising a memory map, the memory map comprising a first region corresponding to inputs to the neural network processor system and a second region corresponding to outputs from the neural network processor system, the interface further comprising a buffer, whereinthe interface is adapted to receive a write request comprising write data and a write address, the write address corresponding to a location within the first region of the memory map,the interface is adapted to send the write data via the network to at least one input location of a destination neural network processing core,the interface is adapted to receive a read request comprising a read address, the read address corresponding to a location within the second region of the memory map,the interface is adapted to return read data to an originator of the read request, the read data comprising an output of a source neural network processing core,the interface is adapted to receive a message via the network from the source neural network processing core, the message comprising message data and at least one address, andthe interface is adapted to store the message data in the buffer at a location, the at least one address corresponding to the location in the buffer.
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Accused Products
Abstract
Memory-mapped interfaces for message passing computing systems are provided. According to various embodiments, a write request is received. The write request comprises write data and a write address. The write address is a memory address within a memory map. The write address is translated into a neural network address. The neural network address identifies at least one input location of a destination neural network. The write data is sent via a network according to the neural network address to the at least one input location of the destination neural network. A message is received via the network from a source neural network. The message comprises data and at least one address. A location in a buffer is determined based on the at least one address. The data is stored at the location in the buffer. The buffer is accessible via the memory map.
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Citations
27 Claims
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1. A system comprising:
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a neural network processor system, comprising at least one neural network processing core interconnected by a network; and an interface operatively connected to the network, the interface comprising a memory map, the memory map comprising a first region corresponding to inputs to the neural network processor system and a second region corresponding to outputs from the neural network processor system, the interface further comprising a buffer, wherein the interface is adapted to receive a write request comprising write data and a write address, the write address corresponding to a location within the first region of the memory map, the interface is adapted to send the write data via the network to at least one input location of a destination neural network processing core, the interface is adapted to receive a read request comprising a read address, the read address corresponding to a location within the second region of the memory map, the interface is adapted to return read data to an originator of the read request, the read data comprising an output of a source neural network processing core, the interface is adapted to receive a message via the network from the source neural network processing core, the message comprising message data and at least one address, and the interface is adapted to store the message data in the buffer at a location, the at least one address corresponding to the location in the buffer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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15. A method comprising:
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receiving a write request at an interface, the write request comprising write data and a write address, the write address corresponding to a location within a first region of a memory map, wherein the interface comprises the memory map, the memory map comprises the first region, the first region corresponding to inputs to a neural network processor system, and a second region corresponding to outputs from the neural network processor system, the interface further comprises a buffer, and the neural network processor system comprises at least one neural network processing core interconnected by a network; translating the write address into a neural network address, the neural network address identifying at least one destination neural network input location of a destination neural network processing core; sending the write data via the network according to the neural network address to the at least one destination neural network input location; receiving a message via the network from a source neural network processing core, the message comprising message data and at least one address; storing the message data in the buffer at a location, the at least one address corresponding to the location in the buffer; receiving a read request comprising a read address, the read address corresponding to a location within the second region of the memory map; and returning read data to an originator of the read request, the read data comprising an output of the source neural network processing core. - View Dependent Claims (16, 17, 18, 19, 20, 21, 22)
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23. A method comprising:
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receiving a write request at an interface, the write request comprising write data and a write address, the write address corresponding to a location within a first region of a memory map, wherein the interface comprises the memory map, the memory map comprises the first region, the first region corresponding to inputs to a neural network processor system, and a second region corresponding to outputs from the neural network processor system, the interface further comprises a buffer, and the neural network processor system comprises at least one neural network processing core interconnected by a network; sending the write data via the network according to a neural network address to at least one destination neural network input location; receiving a message via the network from a source neural network, the message comprising data and at least one address; storing the data at a location in the buffer, the buffer being accessible via the memory map; receiving a read request comprising a read address, the read address being a memory address within the memory map and corresponding to the location in the buffer; and returning the data to an originator of the read request. - View Dependent Claims (24, 25, 26)
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27. A computer program product for interfacing a memory mapped system with a message passing system, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processor to cause the processor to perform a method comprising:
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receiving a write request at an interface, the write request comprising write data and a write address, the write address corresponding to a location within a first region of a memory map, wherein the interface comprises the memory map, the memory map comprises the first region, the first region corresponding to inputs to a neural network processor system, and a second region corresponding to outputs from the neural network processor system, the interface further comprises a buffer, and the neural network processor system comprises at least one neural network processing core interconnected by a network; translating the write address into a neural network address, the neural network address identifying at least one input location of a destination neural network; sending the write data via the network according to the neural network address to the at least one input location of the destination neural network; receiving a message via the network from a source neural network, the message comprising data and at least one address; determining a location in the buffer based on the at least one address; storing the data at the location in the buffer, the buffer being accessible via the memory map; receiving a read request comprising a read address, the read address corresponding to the location within the second region of the memory map; and returning read data to an originator of the read request, the read data comprising the data.
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Specification