In-cell differential read-out circuitry for reading signed weight values in resistive processing unit architecture

• US 10,453,527 B1
• Filed: 03/13/2019
• Issued: 10/22/2019
• Est. Priority Date: 03/30/2018
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Kim, Seyoung, Lee, Hyung-Min, Gokmen, Tayfun, Han, Shu-Jen
• Primary Examiner(s): Hoang, Huan
• Assistant Examiner(s): Radke, Jay W.
• Application Number:
  US16/352,230
• Publication Number:
  US 20190304538A1
• Time in Patent Office: 223 Days
• CPC Class Codes: G06N 3/065 Analogue means
• CPC Class Codes: G06N 3/084 Backpropagation, e.g. using gradient descent
• CPC Class Codes: G11C 13/0038 Power supply circuits
• CPC Class Codes: G11C 13/004 Reading or sensing circuits or methods
• CPC Class Codes: G11C 2013/0042 Read using differential sensing, e.g. bit line [BL] and bit line bar [BLB]
• CPC Class Codes: G11C 2013/0045 Read using current through the cell
• CPC Class Codes: G11C 2013/0054 Read is performed on a reference element, e.g. cell, and the reference sensed value is used to compare the sensed value of the selected cell
• CPC Class Codes: G11C 2213/77 Array wherein the memory element being directly connected to the bit lines and word lines without any access device being used

Abstract

A resistive processing unit (RPU) device includes a weight storage device to store a weight voltage which corresponds to a weight value of the RPU device, and a read transistor having a gate connected to the weight storage device, and first and second source/drain terminals connected to first and second control ports, respectively. A current source connected to the second source/drain terminal generates a fixed reference current. The read transistor generates a weight current in response to the weight voltage. A read current output from the second control port represents a signed weight value of the RPU device. A magnitude of the read current is equal to a difference between the weight current and the fixed reference current. The sign of the read current is positive when the weight current is greater than the fixed reference current, and negative when the weight current is less than the fixed reference current.

Claims

1. A device, comprising:

a resistive processing unit (RPU) cell comprising differential read-out circuitry which is configured to generate a read current based on a weight of the RPU cell, wherein the weight of the RPU cell comprises a weight value and a weight sign;

wherein the differential read-out circuitry is configured to generate the read current as a difference between a first current and a second current;

wherein the read current comprises a magnitude and sign which represent the weight value and the weight sign, respectively, of the RPU cell;

wherein the sign of the read current is deemed positive when the first current is greater than the second current; and

wherein the sign of the read current is deemed negative when the first current is less than the second current.

2. The device of claim 1, wherein the sign of the read current is deemed zero when the first current is equal to the second current.

3. The device of claim 1, wherein the RPU cell further comprises a weight storage device configured to store a weight voltage which represent the weight of the RPU cell.

4. The device of claim 3, wherein the weight storage device comprises a capacitor, and wherein the RPU cell further comprises control circuitry to update the weight voltage stored in the capacitor.

5. The device of claim 3, wherein the differential read-out circuitry of the RPU cell comprises a read transistor, wherein the read transistor is configured to generate the first current in response to the stored weight voltage applied to a gate terminal of the read transistor, and wherein the second current comprises a fixed reference current.

6. The device of claim 5, wherein the read transistor comprises a first source/drain terminal coupled to a first port of the RPU cell, and a second source/drain terminal coupled to a second port of the RPU cell, wherein the gate terminal of the read transistor is coupled to the weight storage device, wherein the RPU cell further comprises a current source coupled to the second source/drain terminal of the read transistor, wherein the current source is configured to generate the fixed reference current, and wherein the read current is output from the second port of the RPU cell.

7. The device of claim 6, wherein the read transistor comprises an NMOS device and wherein the current source is coupled to a source terminal of the read transistor, wherein the current source serves as a current sink to sink the fixed reference current from the source terminal of the read transistor.

8. The device of claim 3, wherein the differential read-out circuitry of the RPU cell comprises:

a first read transistor configured to generate the first current in response to the stored weight voltage applied to a gate terminal of the first read transistor;

a second read transistor configured to generate the second current in response to the stored weight voltage applied to a gate terminal of the second read transistor; and

current integration circuitry configured to generate the read current as a difference between the first current and the second current.

9. The device of claim 8, wherein the first and second currents are complementary currents.

10. The device of claim 8, wherein the first read transistor comprises an NMOS device, wherein the second read transistor comprises a PMOS device, wherein the gate terminals of the first and second read transistors are commonly connected.

11. The device of claim 8, wherein:

the first read transistor comprises a first source/drain terminal coupled to a first port of the RPU cell, and a second source/drain terminal coupled to a first node of the current integration circuitry;

the second read transistor comprises a first source/drain terminal coupled to a second port of the RPU cell, and a second source/drain terminal coupled to a second node of the current integration circuitry; and

the current integration circuitry comprises an output terminal coupled to a third port of the RPU cell, wherein the current integration circuitry is configured to generate and output the read current to the third port of the RPU cell.

12. The device of claim 8, wherein the current integration circuitry comprises a current mirror circuit.

13. The device of claim 12, wherein the current mirror circuit comprises:

a reference node coupled to the second source/drain terminal of the second read transistor; and

an output node commonly coupled to the second source/drain terminal of the first read transistor and the third port of the RPU cell;

wherein the current mirror circuit is configured to mirror the second current, which flows from the second source/drain terminal of the second read transistor into the reference node, and sink the mirrored second current into the output node of the current mirror circuit such that the read current is generated as a difference between the first current and the mirrored second current.

14. The device of claim 1, wherein the differential read-out circuitry of the RPU cell comprises:

a current mirror circuit comprising a reference node and an output node;

a variable resistor device having a resistance value which corresponds to the weight of the RPU cell, wherein the variable resistor device is coupled between a first port and a second port of the RPU cell, and coupled to the output node of the current mirror circuit; and

a fixed resistor device having a fixed resistance value, wherein the fixed resistor device is coupled between the first port of the RPU cell and the reference node of the current mirror circuit;

wherein the variable resistor device is configured to generate the first current in response to a control voltage applied to the first port of the RPU cell;

wherein the fixed resistor device is configured to generate the second current in response to the control voltage applied to the first port of the RPU cell; and

wherein the current mirror circuit is configured to mirror the second current, and sink the mirrored second current into the output node of the current mirror circuit to generate the read current which is output from the second port of the RPU device, wherein the read current is generated as a difference between the first current and the mirrored second current.

15. The device of claim 14, wherein the RPU cell further comprises voltage equalization circuitry which is configured to maintain equal voltage levels at the reference node and the output node of the current mirror circuit.

16. The device of claim 15, wherein the voltage equalization circuitry comprises:

a PMOS transistor serially connected between the fixed resistor device and the reference node of the current mirror circuit; and

an operational amplifier having an output coupled to a gate terminal of the PMOS transistor, an inverting input coupled to a node between the fixed resistor device and a source/drain terminal of the PMOS device, and a non-inverting input coupled to the output node of the current mirror circuit.

17. The device of claim 16, wherein the operational amplifier comprises:

a differential input stage;

a current mirror which is configured to provide a load for the differential input stage; and

a constant current biasing transistor which is configured to bias the differential input stage of the operational amplifier.

18. The device of claim 14, wherein the RPU cell further comprises control circuitry which is configured to adjust a resistance value of the variable resistor device to update the weight of the RPU cell.

19. The device of claim 1, wherein the device comprises an RPU crossbar array system comprising an array of RPU cells.

20. A device comprising:

an array of resistive processing unit (RPU) cells; and

control circuitry configured to control the array of RPU cells, wherein the control circuitry is configured to read and update weights of selected RPU cells in the array of RPU cells;

wherein each RPU cell in the array of RPU cells comprises differential read-out circuitry which is configured to generate a read current based on a weight of the RPU cell, wherein the weight of the RPU cell comprises a weight value and a weight sign;

wherein the differential read-out circuitry is configured to generate the read current as a difference between a first current and a second current;

wherein the read current comprises a magnitude and sign which represent the weight value and the weight sign, respectively, of the RPU cell;

wherein the sign of the read current is deemed positive when the first current is greater than the second current; and

wherein the sign of the read current is deemed negative when the first current is less than the second reference current.