Method of manufacturing semiconductor device

• US 10,453,687 B2
• Filed: 06/06/2018
• Issued: 10/22/2019
• Est. Priority Date: 07/12/2017
• Status: Active Grant

• Current Assignee: Fuji Electric Company Limited (Fuji Electric Systems Company Limited)
• Original Assignee: Fuji Electric Company Limited (Fuji Electric Systems Company Limited)
• Inventors: Iguchi, Kenichi, Nakazawa, Haruo
• Primary Examiner(s): Junge, Bryan R
• Application Number:
  US16/001,159
• Publication Number:
  US 20190019679A1
• Time in Patent Office: 503 Days
• CPC Class Codes: H01L 21/0455 Making n or p doped regions or layers, e.g. using diffusion
• CPC Class Codes: H01L 21/046 using ion implantation
• CPC Class Codes: H01L 21/0485 Ohmic electrodes
• CPC Class Codes: H01L 21/0495 Schottky electrodes
• CPC Class Codes: H01L 21/2254 from or through or into an applied layer, e.g. photoresist, nitrides
• CPC Class Codes: H01L 21/268 using electromagnetic radiation, e.g. laser radiation
• CPC Class Codes: H01L 21/28512 on semiconductor bodies comprising elements of Group IV of the Periodic Table
• CPC Class Codes: H01L 29/0619 with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/1608 Silicon carbide
• CPC Class Codes: H01L 29/45 Ohmic electrodes
• CPC Class Codes: H01L 29/66053 of devices having a semiconductor body comprising crystalline silicon carbide
• CPC Class Codes: H01L 29/6606 the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
• CPC Class Codes: H01L 29/66068 the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
• CPC Class Codes: H01L 29/7393 Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
• CPC Class Codes: H01L 29/7395 Vertical transistors, e.g. vertical IGBT
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7827 Vertical transistors H01L29/7802, H01L29/78642 take precedence
• CPC Class Codes: H01L 29/8122 Vertical transistors SIT, PBT H01L29/7722
• CPC Class Codes: H01L 29/8611 : Planar PN junction diodes
• CPC Class Codes: H01L 29/872 : Schottky diodes

Abstract

A method of manufacturing a semiconductor device includes: forming, on a surface of an n-type semiconductor layer, an impurity source film containing both aluminum and beryllium; and forming a p-type impurity-doped layer in the n-type semiconductor layer by irradiating the impurity source film with first laser light to simultaneously introduce the aluminum and the beryllium into the n-type semiconductor layer.

Claims

1. A method of manufacturing a semiconductor device, comprising:

forming, on a surface of an n-type semiconductor layer, an impurity source film containing both aluminum and beryllium; and

forming a p-type impurity-doped layer in the n-type semiconductor layer by irradiating the impurity source film with first laser light to simultaneously introduce the aluminum and the beryllium into the n-type semiconductor layer.

2. The method of manufacturing a semiconductor device according to claim 1, wherein the impurity source film is a single-layer film.

3. The method of manufacturing a semiconductor device according to claim 2, wherein the impurity source film contains 0.1 atomic percent to 5 atomic percent of the beryllium.

4. The method of manufacturing a semiconductor device according to claim 2, wherein the impurity source film has a thickness of 30 nm to 1 μ

m.

5. The method of manufacturing a semiconductor device according to claim 1, wherein the impurity source film is a multilayer film in which an aluminum layer and a beryllium layer are laminated together.

6. The method of manufacturing a semiconductor device according to claim 5, wherein the multilayer film is a two-layer film in which the beryllium layer and the aluminum layer are laminated in that order on the surface of the n-type semiconductor layer.

7. The method of manufacturing a semiconductor device according to claim 1, wherein the irradiation with the first laser light is performed in a vacuum or in an inert gas.

8. The method of manufacturing a semiconductor device according to claim 1, further comprising:

forming a metal film on a bottom surface of a supporting layer that is formed beneath the n-type semiconductor layer; and

irradiating the formed metal film with second laser light to promote silicidation between the metal film and the supporting layer.

9. The method of manufacturing a semiconductor device according to claim 1, further comprising:

before forming the impurity source film, forming, on an upper surface of the n-type semiconductor layer, a mask for defining a region where the p-type impurity-doped layer is to be formed, wherein in the subsequent step of forming the impurity source film, the impurity source film is formed on the mask;

after irradiating with the first laser light, removing the mask to remove a residue of the impurity source film from the upper surface of the n-type semiconductor layer; and

forming a contact electrode on the upper surface of the n-type semiconductor layer from which the residue of the impurity source film has been removed.

10. The method of manufacturing a semiconductor device according to claim 1, further comprising:

forming a metal film on a bottom surface of a supporting layer formed beneath the n-type semiconductor layer; and

forming a Schottky contact electrode by heating the formed metal film and the supporting layer.

11. The method of manufacturing a semiconductor device according to claim 1, wherein the p-type impurity-doped layer formed in the n-type semiconductor layer has a ring shape as seen in a plan view.

12. The method of manufacturing a semiconductor device according to claim 1, wherein the p-type impurity-doped layer formed in the n-type semiconductor layer has a plurality of line-shaped regions arranged parallel to one another with gaps therebetween in a plan view.

13. The method of manufacturing a semiconductor device according to claim 1, wherein the n-type semiconductor layer is made of a silicon carbide semiconductor.

14. The method of manufacturing a semiconductor device according to claim 13, wherein the silicon carbide semiconductor has any one of a 4H, 6H, or 3C monocrystalline structure or a polycrystalline structure.

15. The method of manufacturing a semiconductor device according to claim 1, wherein the first laser light has a wavelength of greater than or equal to 190 nm.

16. The method of manufacturing a semiconductor device according to claim 1, wherein a pulse width of the first laser light is 50 nanoseconds to 1 microsecond.