Oxide thin film transistor display substrate, manufacturing method thereof, and display device

• US 10,453,966 B2
• Filed: 05/04/2018
• Issued: 10/22/2019
• Est. Priority Date: 10/19/2017
• Status: Active Grant

• Current Assignee: BOE Technology Group Co., Ltd., Fuzhou BOE Optoelectronics Technology Co., Ltd. (BOE Technology Group Co., Ltd.)
• Original Assignee: BOE Technology Group Co., Ltd.
• Inventors: Liu, Xiaowei, Meng, Fanqing, Wang, Yang, An, Yabin, Fan, Zhiyong, Wu, Chenglong
• Primary Examiner(s): Yushin, Nikolay K
• Application Number:
  US15/971,089
• Publication Number:
  US 20190123206A1
• Time in Patent Office: 536 Days
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: G02F 2201/121 common or background
• CPC Class Codes: G02F 2201/123 pixel
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 27/1259 Multistep manufacturing methods
• CPC Class Codes: H01L 27/1262 with a particular formation, treatment or coating of the substrate
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78609 for preventing leakage current H01L29/78618 takes precedence
• CPC Class Codes: H01L 29/78633 with a light shield
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

The present disclosure provides in some embodiments an oxide TFT display substrate, a manufacture method thereof and a display device. The oxide TFT display substrate includes a first region at least corresponding to a semiconducting region of an oxide TFT and a second region other than the first region. The method includes steps of: forming, after the formation of the oxide TFT, a SiON layer at least covering the first region; and forming a SiNx layer covering the second region.

Claims

1. A method for manufacturing an oxide thin film transistor (TFT) display substrate, the oxide TFT display substrate comprising a first region at least corresponding to a semiconducting region of an oxide TFT and a second region other than the first region, the method comprising:

providing a base substrate with the oxide TFT and one or more common electrode lines, the oxide TFT including a gate electrode, a gate insulation layer, an active layer, a source electrode and a drain electrode sequentially formed on the base substrate, an orthogonal projection of the active layer onto the base substrate falling within an orthogonal projection of the gate electrode onto the base substrate, the one or more common electrode lines being arranged at a layer identical to the gate electrode and being of a slit-like shape;

forming a passivation layer covering the oxide TFT and comprising a SiON layer, the SiON layer at least covering the first region;

forming a pixel electrode and a common electrode on the passivation layer, the common electrode being connected to the one or more common electrode lines through a first via-hole penetrating through the gate insulation layer and the passivation layer, the pixel electrode being connected to the drain electrode through a second via-hole penetrating through the passivation layer;

applying a photoresist onto the base substrate with the pixel electrode and the common electrode, and exposing a portion of the photoresist not shielded by the gate electrode from a side of the base substrate away from the oxide TFT;

developing the photoresist so as to remove the portion of the photoresist not shielded by the gate electrode and reserve a portion of the photoresist shielded by the gate electrode;

depositing a layer of SiNx, a portion of the first via-hole being filled with the layer of SiNx; and

removing the remaining photoresist and the layer of SiNx on the remaining photoresist

forming a SiNx layer only covering the second region.

2. The method according to claim 1, wherein the forming the SiON layer at least covering the first region comprises forming the SiON layer covering both the first region and the second region.

3. The method according to claim 1, wherein prior to the forming the SiNx layer covering the second region, the method further comprises forming the first via-hole having a depth greater than a predetermined threshold in the oxide TFT display substrate, wherein the SiNx layer is filled into the first via-hole in the meantime of forming the SiNx layer covering the second region.

4. The method according to claim 1, wherein the SiNx layer is deposited at a temperature of less than 250°

C.

5. An oxide thin film transistor (TFT) display substrate, comprising:

a first region at least corresponding to a semiconducting region of an oxide TFT and a second region other than the first region;

a base substrate;

the oxide TFT and one or more common electrode lines arranged on the base substrate, the oxide TFT including a gate electrode, a gate insulation layer, an active layer, a source electrode and a drain electrode sequentially formed on the base substrate, an orthogonal projection of the active layer onto the base substrate falling within an orthogonal projection of the gate electrode onto the base substrate, the one or more common electrode lines being arranged at a layer identical to the gate electrode and being of a slit-like shape;

a passivation layer covering the oxide TFT and including a SiON layer;

the SiON layer arranged on the oxide TFT and at least covering the first region;

a pixel electrode and a common electrode arranged on the passivation layer, the common electrode being connected to the one or more common electrode lines through a first via-hole penetrating through the gate insulation layer and the passivation layer, the pixel electrode being connected to the drain electrode through a second via-hole penetrating through the passivation layer; and

a SiNx layer arranged on the passivation layer and covering the second region, an orthogonal projection of the SiNx layer onto the base substrate not overlapping the orthogonal projection of the gate electrode onto the base substrate.

6. The oxide TFT display substrate according to claim 5, wherein the SiON layer covers both the first region and the second region.

7. The oxide TFT display substrate according to claim 5, wherein the first via-hole having a depth greater than a predetermined threshold is formed in the oxide TFT display substrate, and a portion of the first via-hole is filled with the SiNx layer.

8. The oxide TFT display substrate according to claim 5, wherein the passivation layer further comprises a SiOx layer arranged between the oxide TFT and the SiON layer.

9. The oxide TFT display substrate according to claim 5, wherein an organic resin layer made of an organic photosensitive material and having a thickness of about 4000 Å

to 30000 Å

is coated onto the passivation layer, and then exposed and developed, so as to form a pattern of the passivation layer with the first via-hole and the second via-hole through a single etching process.

10. The oxide TFT display substrate according to claim 9, wherein an organic resin layer having a thickness of about 4000 Å

to 30000 Å and

made of benzocyclobutene (BCB) is coated onto the passivation layer, and then exposed and developed, so as to form a pattern of the passivation layer with the first via-hole and the second via-hole through a single etching process.

11. A display device, comprising an oxide thin film transistor (TFT) display substrate, wherein the oxide TFT display substrate comprises:

a first region at least corresponding to a semiconducting region of an oxide TFT and a second region other than the first region;

a base substrate;

the oxide TFT and one or more common electrode lines arranged on the base substrate, the oxide TFT including a gate electrode, a gate insulation layer, an active layer, a source electrode and a drain electrode sequentially formed on the base substrate, an orthogonal projection of the active layer onto the base substrate falling within an orthogonal projection of the gate electrode onto the base substrate, the one or more common electrode lines being arranged at a layer identical to the gate electrode and being of a slit-like shape;

a passivation layer covering the oxide TFT and including a SiON layer;

the SiON layer arranged on the oxide TFT and at least covering the first region;

a pixel electrode and a common electrode arranged on the passivation layer, the common electrode being connected to the one or more common electrode lines through the first via-hole penetrating through the gate insulation layer and the passivation layer, the pixel electrode being connected to the drain electrode through a second via-hole penetrating through the passivation layer; and

a SiNx layer arranged on the passivation layer and covering the second region, an orthogonal projection of the SiNx layer onto the base substrate not overlapping the orthogonal projection of the gate electrode onto the base substrate.

12. The display device according to claim 11, wherein the SiON layer covers both the first region and the second region.

13. The display device according to claim 11, wherein the first via-hole having a depth greater than a predetermined threshold is formed in the oxide TFT display substrate, and a portion of the first via-hole is filled with the SiNx layer.

14. The display device according to claim 11, wherein the passivation layer further comprises a SiOx layer arranged between the oxide TFT and the SiON layer.

15. The display device according to claim 11, further comprising a flexible circuit board (FCB), a printed circuit board (PCB) and a back plate.

16. The display device according to claim 11, wherein an organic resin layer made of an organic photosensitive material and having a thickness of about 4000 Å

to 30000 Å

is coated onto the passivation layer, and then exposed and developed, so as to form a pattern of the passivation layer with the first via-hole and the second via-hole through a single etching process.

17. The display device according to claim 16, wherein an organic resin layer having a thickness of about 4000 Å

to 30000 Å and

made of benzocyclobutene (BCB) is coated onto the passivation layer, and then exposed and developed, so as to form a pattern of the passivation layer with the first via-hole and the second via-hole through a single etching process.