Charge pump overshoot prevention for gate drivers

• US 10,454,360 B1
• Filed: 11/15/2018
• Issued: 10/22/2019
• Est. Priority Date: 11/15/2018
• Status: Active Grant

• Current Assignee: NXP USA, Inc. (NXP Semiconductors NV)
• Original Assignee: NXP USA, Inc. (NXP Semiconductors NV)
• Inventors: Dashtestani, Ahmad, Delshadpour, Siamak
• Primary Examiner(s): Le, Dinh T
• Application Number:
  US16/192,410
• Time in Patent Office: 341 Days
• CPC Class Codes: H02H 9/001 limiting speed of change of electric quantities, e.g. soft switching on or off progressive control of electronic switches for eliminating interferences H03K17/16
• CPC Class Codes: H02H 9/04 responsive to excess voltage lightning arrestors H01C7/12, H01C8/04, H01G9/18, H01T
• CPC Class Codes: H02M 1/32 Means for protecting converters other than automatic disconnection
• CPC Class Codes: H02M 3/07 using capacitors charged and discharged alternately by semiconductor devices with control electrode , e.g. charge pumps
• CPC Class Codes: H03K 17/163 Soft switching
• CPC Class Codes: H03K 2217/0054 Gating switches, e.g. pass gates

Abstract

An over-voltage protection circuit and method may include a pass gate and a voltage boosting circuit for providing protection to start-up voltage-sensitive circuits during start-up conditions of a system including the voltage-sensitive circuits. The pass gate may include a drain, source, and gate, with the drain configured to receive an input signal and the source configured to output the input signal, in response to a pass gate driving voltage signal applied to the gate of the pass gate. The voltage boosting circuit may include an output coupled to the gate of the pass gate, the voltage boosting circuit configured to generate a pass gate driving voltage on the output. The voltage boosting circuit further configured to passively control the pass gate driving voltage to a level less than a steady-state voltage level during start-up of the protection circuit.

Claims

1. A protection circuit, comprising:

a pass gate including a drain configured to receive an input signal, a source configured to output the input signal, and a gate configured to control passing of the input signal between the drain and the source; and

a voltage boosting circuit including an output coupled to the gate of the pass gate, the voltage boosting circuit configured to generate a pass gate driving voltage on the output, the voltage boosting circuit further configured to passively control the pass gate driving voltage to a level less than a steady-state voltage level during start-up of the protection circuit, wherein the voltage boosting circuit includes;

an oscillator; and

a charge pump configured to generate the levels of the pass gate driving voltage in response to control by the oscillator;

wherein the oscillator includes a start-up oscillator bias control circuit configured to reduce a frequency of the oscillator during start-up of the protection circuit, the frequency reduced to frequencies less than a steady-state frequency to passively control the pass gate driving voltage.

2. A protection circuit, comprising:

a pass gate including a drain configured to receive an input signal, a source configured to output the input signal, and a gate configured to control passing of the input signal between the drain and the source; and

a voltage boosting circuit including an output coupled to the gate of the pass gate, the voltage boosting circuit configured to generate a pass gate driving voltage on the output, the voltage boosting circuit further configured to passively control the pass gate driving voltage to a level less than a steady-state voltage level during start-up of the protection circuit, wherein the voltage boosting circuit includes;

an oscillator; and

a charge pump configured to generate the levels of the pass gate driving voltage in response to control by the oscillator;

wherein the oscillator includes a start-up oscillator bias control circuit configured to reduce a bias current to the oscillator during start-up of the protection circuit, the bias current reduced to levels less than a steady-state level to passively control the pass gate driving voltage.

3. A protection circuit, comprising:

a pass gate including a drain configured to receive an input signal, a source configured to output the input signal, and a gate configured to control passing of the input signal between the drain and the source; and

a voltage boosting circuit including an output coupled to the gate of the pass gate, the voltage boosting circuit configured to generate a pass gate driving voltage on the output, the voltage boosting circuit further configured to passively control the pass gate driving voltage to a level less than a steady-state voltage level during start-up of the protection circuit, wherein the voltage boosting circuit includes;

an oscillator; and

a charge pump configured to generate the levels of the pass gate driving voltage in response to control by the oscillator;

wherein the oscillator includes;

a ring oscillator; and

a current mirror of a plurality of transistors configured to supply a bias current to the ring oscillator;

wherein the protection circuit includes a start-up oscillator bias control circuit configured to provide low-pass filtering of gates of the plurality of transistors in the current mirror.

4. The protection circuit of claim 3, further including a start-up oscillator bias control circuit configured to reduce a frequency of the oscillator to a level less than a steady-state level during start-up of the protection circuit.

5. The protection circuit of claim 3, further including a start-up oscillator bias control circuit configured to reduce the bias current to the ring oscillator during start-up of the protection circuit.

6. An interconnection system, comprising:

a first printed circuit board (PCB) node coupled to an external interface;

a second PCB node coupled to an electronic circuit; and

an over-voltage protection circuit coupled between the first PCB node and the second PCB node, the over-voltage protection circuit including;

a pass gate including a drain configured to receive an input signal, a source configured to output the input signal, and a gate configured to control passing of the input signal between the drain and the source; and

a voltage boosting circuit including an output coupled to the gate of the pass gate, the voltage boosting circuit configured to generate a pass gate driving voltage on the output, the voltage boosting circuit further configured to passively control the pass gate driving voltage to a level less than a steady-state voltage level during start-up of the protection circuit, wherein the voltage boosting circuit includes;

an oscillator; and

a charge pump configured to generate the levels of the pass gate driving voltage in response to control by the oscillator;

wherein the oscillator includes a start-up oscillator bias control circuit configured to reduce a frequency of the oscillator during start-up of the protection circuit, the frequency reduced to frequencies less than a steady-state frequency to passively control the pass gate driving voltage.

7. The interconnection system of claim 6, wherein the start-up oscillator bias control circuit is configured to reduce a bias current to the oscillator during start-up of the protection circuit, the bias current reduced to levels less than a steady-state level to passively control the pass gate driving voltage.

8. The interconnection system of claim 6, wherein the oscillator includes:

a ring oscillator; and

a current mirror of a plurality of transistors configured to supply a bias current to the ring oscillator.

9. The interconnection system of claim 8, further including a start-up oscillator bias control circuit configured to reduce a frequency of the oscillator to a level less than a steady-state level during start-up of the over-voltage protection circuit.

10. The interconnection system of claim 8, further including a start-up oscillator bias control circuit configured to reduce the bias current to the ring oscillator during start-up of the over-voltage protection circuit.

11. The interconnection system of claim 8, further including a start-up oscillator bias control circuit configured to provide low-pass filtering of gates of the plurality of transistors in the current mirror.

12. A method, comprising:

generating bias current to a ring oscillator of an over-voltage protection circuit, a level of the bias current being less than a steady-state level during start-up of an over-voltage protection circuit;

generating an oscillator signal at an output of the ring oscillator, the oscillator signal having a frequency based on the level of the bias current;

boosting a reference voltage to a pass gate driving voltage to control a gate of a pass transistor of the over-voltage protection circuit; and

driving the gate of the pass transistor with the pass gate driving voltage.

13. The method of claim 12, wherein the generating the bias current includes:

passively reducing a bias current to a ring oscillator of an over-voltage protection circuit during start-up of the ring oscillator; and

increasing the bias current to the ring oscillator during steady-state of the ring oscillator.

14. The method of claim 13, wherein the passively reducing a bias current includes:

low-pass filtering a supply voltage at gates of a current mirror outputting the bias current to the ring oscillator during start-up of the ring oscillator.

15. The method of claim 14, wherein the low-pass filtering includes filtering with a capacitor coupled between the gates of the current mirror and a supply line providing the supply voltage.