Die with integrated microphone device using through-silicon vias (TSVs)

• US 10,455,308 B2
• Filed: 09/17/2014
• Issued: 10/22/2019
• Est. Priority Date: 09/17/2014
• Status: Active Grant

• Current Assignee: Exo Imaging Inc.
• Original Assignee: Intel Corporation
• Inventors: Lee, Kevin J., Saraswat, Ruchir, Zillmann, Uwe, Rao, Valluri Bob, Lund-Larsen, Tor, Cowley, Nicholas P.
• Primary Examiner(s): Le, Huyen D
• Application Number:
  US15/502,495
• Publication Number:
  US 20170245035A1
• Time in Patent Office: 1,861 Days
• Field of Search: 381113, 381116, 381369, 381173, 381174, 381175, 381191, 257416, 438 51, 438 53, 367181
• CPC Class Codes: B81B 2201/0257 Microphones or microspeakers
• CPC Class Codes: B81B 2207/096 through the substrate
• CPC Class Codes: B81B 7/02 containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS] B81B7/04 takes precedence
• CPC Class Codes: B81C 1/00158 Diaphragms, membranes manufacture process for semi-permeable inorganic membranes B01D67/0039
• CPC Class Codes: B81C 2201/0132 Dry etching, i.e. plasma etching, barrel etching, reactive ion etching [RIE], sputter etching or ion milling
• CPC Class Codes: B81C 2203/0109 Bonding an individual cap on the substrate
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 21/6836 Wafer tapes, e.g. grinding or dicing support tapes adhesive tapes in general C09J7/20
• CPC Class Codes: H01L 21/76898 formed through a semiconductor substrate
• CPC Class Codes: H01L 2221/68304 using temporarily an auxiliary support
• CPC Class Codes: H01L 2221/68327 used during dicing or grinding
• CPC Class Codes: H01L 2221/6834 used to protect an active side of a device or wafer
• CPC Class Codes: H01L 2221/68381 Details of chemical or physical process used for separating the auxiliary support from a device or wafer
• CPC Class Codes: H01L 2224/11 Manufacturing methods
• CPC Class Codes: H01L 2224/131 with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/16227 the bump connector connecting to a bond pad of the item
• CPC Class Codes: H01L 2224/27 Manufacturing methods
• CPC Class Codes: H01L 2224/27002 for supporting the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/27618 with selective exposure, development and removal of a photosensitive layer material, e.g. of a photosensitive conductive resin
• CPC Class Codes: H01L 2224/27848 : Thermal treatments, e.g. annealing, controlled cooling
• CPC Class Codes: H01L 2224/29011 : comprising apertures or cavities
• CPC Class Codes: H01L 2224/2919 : with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/3201 : Structure
• CPC Class Codes: H01L 2224/32058 : being non uniform along the layer connector
• CPC Class Codes: H01L 2224/32225 : the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/32245 : the item being metallic
• CPC Class Codes: H01L 2224/73204 : the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2224/81 : using a bump connector
• CPC Class Codes: H01L 2224/83 : using a layer connector
• CPC Class Codes: H01L 2224/83005 : being a temporary or sacrificial substrate
• CPC Class Codes: H01L 2224/83193 : wherein the layer connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/83438 : the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
• CPC Class Codes: H01L 2224/8346 : Iron [Fe] as principal constituent
• CPC Class Codes: H01L 2224/83488 : Glasses, e.g. amorphous oxides, nitrides or fluorides
• CPC Class Codes: H01L 2224/8359 : with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/83688 : Glasses, e.g. amorphous oxides, nitrides or fluorides
• CPC Class Codes: H01L 2224/83862 : Heat curing
• CPC Class Codes: H01L 2224/92 : Specific sequence of method steps
• CPC Class Codes: H01L 2224/9222 : Sequential connecting processes
• CPC Class Codes: H01L 2224/92225 : the second connecting process involving a layer connector
• CPC Class Codes: H01L 23/481 : Internal lead connections, e.g. via connections, feedthrough structures
• CPC Class Codes: H01L 24/13 : of an individual bump connector
• CPC Class Codes: H01L 24/16 : of an individual bump connector
• CPC Class Codes: H01L 24/27 : Manufacturing methods
• CPC Class Codes: H01L 24/29 : of an individual layer connector
• CPC Class Codes: H01L 24/32 : of an individual layer connector
• CPC Class Codes: H01L 24/83 : using a layer connector
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/0665 : Epoxy resin
• CPC Class Codes: H01L 2924/1461 : MEMS
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/161 : Cap
• CPC Class Codes: H01L 2924/16151 : Cap comprising an aperture, e.g. for pressure control, encapsulation
• CPC Class Codes: H01L 2924/16152 : Cap comprising a cavity for hosting the device, e.g. U-shaped cap
• CPC Class Codes: H01L 2924/163 : Connection portion, e.g. seal
• CPC Class Codes: H01L 2924/166 : Material
• CPC Class Codes: H04R 1/04 : Structural association of microphone with electric circuitry therefor in deaf-aid sets H04R25/00
• CPC Class Codes: H04R 1/406 : microphones
• CPC Class Codes: H04R 19/005 : using semiconductor materials
• CPC Class Codes: H04R 19/04 : Microphones H04R19/01 takes precedence

Abstract

Embodiments of the present disclosure describe a die with integrated microphone device using through-silicon vias (TSVs) and associated techniques and configurations. In one embodiment, an apparatus includes an apparatus comprising a semiconductor substrate having a first side and a second side disposed opposite to the first side, an interconnect layer formed on the first side of the semiconductor substrate, a through-silicon via (TSV) formed through the semiconductor substrate and configured to route electrical signals between the first side of the semiconductor substrate and the second side of the semiconductor substrate, and a microphone device formed on the second side of the semiconductor substrate and electrically coupled with the TSV. Other embodiments may be described and/or claimed.

Claims

1. An apparatus comprising:

a semiconductor substrate having a first side and a second side opposite to the first side;

an interconnect layer on the first side of the semiconductor substrate;

a first through-silicon via (TSV) through the semiconductor substrate, the first TSV to route electrical signals between the first side of the semiconductor substrate and the second side of the semiconductor substrate;

a microphone device on the second side of the semiconductor substrate and electrically coupled with the first TSV;

a device layer on the first side of the semiconductor substrate, wherein the first TSV is to route electrical signals between an active device of the device layer and the microphone device; and

a second TSV to structurally support the microphone device, wherein the second TSV is not to route electrical signals between the device layer and the microphone device.

2. The apparatus of claim 1, wherein the microphone device comprises:

a back-plate on the second side of the semiconductor substrate and coupled with the first TSV; and

a membrane film coupled with the back-plate to form a capacitor.

3. The apparatus of claim 2, wherein the microphone device further comprises:

a chamber in the semiconductor substrate adjacent to the membrane film.

4. The apparatus of claim 2, further comprising:

a lid to cover the microphone device.

5. The apparatus of claim 4, further comprising:

a passivation layer on the second side of the semiconductor substrate, wherein the passivation layer is between at least a portion of the back-plate and the semiconductor substrate; and

a cavity layer on the passivation layer and having a cavity formed in the cavity layer, wherein the membrane film is in the cavity and the lid is coupled with the cavity layer.

6. The apparatus of claim 4, wherein the lid includes a sound port hole.

7. The apparatus of claim 4, further comprising a flip-chip substrate including a sound port hole, wherein:

the semiconductor substrate is part of a die that is coupled with the flip-chip substrate in a flip-chip configuration;

the lid is coupled with the flip-chip substrate to form a cavity;

the die is within the cavity; and

the sound port hole provides access for sound to the cavity.

8. The apparatus of claim 1, wherein:

the semiconductor substrate is part of a first die;

the first die is coupled with a second die; and

the second die includes receiver or sensor circuitry of the microphone device.

9. The apparatus of claim 1, wherein the microphone device is one of a plurality of microphone devices on the second side of the semiconductor substrate.

10. A computing device comprising:

a circuit board; and

a die electrically coupled with the circuit board, the die including;

a semiconductor substrate having a first side and a second side opposite to the first side;

an interconnect layer on the first side of the semiconductor substrate;

a first through-silicon via (TSV) through the semiconductor substrate, the first TSV to route electrical signals between the first side of the semiconductor substrate and the second side of the semiconductor substrate;

a microphone device on the second side of the semiconductor substrate and electrically coupled with the first TSV;

a device layer on the first side of the semiconductor substrate, wherein the first TSV is to route electrical signals between an active device of the device layer and the microphone device; and

a second TSV to structurally support the microphone device, wherein the second TSV is not to route electrical signals between the device layer and the microphone device.

11. The computing device of claim 10, wherein:

the die is coupled with a package substrate; and

the package substrate is coupled with the circuit board.

12. The computing device of claim 10, wherein:

the computing device is a mobile computing device including one or more of an antenna, a display, a touchscreen display, a touchscreen controller, a battery, an audio codec, a video codec, a power amplifier, a global positioning system (GPS) device, a compass, a Geiger counter, an accelerometer, a gyroscope, a speaker, and a camera.

13. The computing device of claim 10, wherein the microphone device comprises:

a back-plate on the second side of the semiconductor substrate and coupled with the first TSV; and

a membrane film coupled with the back-plate to form a capacitor.

14. The computing device of claim 13, wherein the microphone device further comprises:

a chamber in the semiconductor substrate adjacent to the membrane film.

15. The computing device of claim 13, further comprising:

a lid to cover the microphone device.

16. The computing device of claim 15, further comprising:

a passivation layer on the second side of the semiconductor substrate, wherein the passivation layer is between at least a portion of the back-plate and the semiconductor substrate; and

a cavity layer on the passivation layer and having a cavity formed in the cavity layer, wherein the membrane film is in the cavity and the lid is coupled with the cavity layer.

17. The computing device of claim 15, wherein the lid includes a sound port hole.

18. The computing device of claim 15, further comprising a flip-chip substrate including a sound port hole, wherein:

the die is coupled with the flip-chip substrate in a flip-chip configuration;

the lid is coupled with the flip-chip substrate to form a cavity;

the die is within the cavity; and

the sound port hole provides access for sound to the cavity.

19. An apparatus comprising:

a semiconductor substrate having a first side and a second side opposite to the first side;

an interconnect layer on the first side of the semiconductor substrate;

a through-silicon via (TSV) through the semiconductor substrate, the TSV to route electrical signals between the first side of the semiconductor substrate and the second side of the semiconductor substrate;

a microphone device on the second side of the semiconductor substrate and electrically coupled with the TSV, wherein the microphone device comprises;

a back-plate on the second side of the semiconductor substrate and coupled with the TSV; and

a membrane film coupled with the back-plate to form a capacitor;

a lid to cover the microphone device;

a passivation layer on the second side of the semiconductor substrate, wherein the passivation layer is between at least a portion of the back-plate and the semiconductor substrate; and

a cavity layer on the passivation layer and having a cavity formed in the cavity layer, wherein the membrane film is in the cavity and the lid is coupled with the cavity layer.

20. The apparatus of claim 19, wherein the microphone device further comprises:

a chamber in the semiconductor substrate adjacent to the membrane film.

21. The apparatus of claim 19, wherein the lid includes a sound port hole.