Non-volatile storage system with integrated compute engine and optimized use of local fast memory

• US 10,459,644 B2
• Filed: 10/06/2017
• Issued: 10/29/2019
• Est. Priority Date: 10/28/2016
• Status: Active Grant

• Current Assignee: Sandisk Technologies Incorporated (Western Digital Corporation)
• Original Assignee: Western Digital Technologies Incorporated (Western Digital Corporation)
• Inventors: Mehra, Pankaj, Mohan, Vidyabhushan
• Primary Examiner(s): Yi, David
• Assistant Examiner(s): Puche, Tahilba O
• Application Number:
  US15/726,903
• Publication Number:
  US 20180121121A1
• Time in Patent Office: 753 Days
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 12/0692 Multiconfiguration, e.g. local and global addressing
• CPC Class Codes: G06F 12/10 Address translation
• CPC Class Codes: G06F 2212/1044 Space efficiency improvement
• CPC Class Codes: G06F 2212/657 Virtual address space management
• CPC Class Codes: G06F 2212/7201 Logical to physical mapping or translation of blocks or pages
• CPC Class Codes: G06F 2212/7207 management of metadata or control data
• CPC Class Codes: G06F 3/0604 Improving or facilitating administration, e.g. storage management
• CPC Class Codes: G06F 3/061 Improving I/O performance
• CPC Class Codes: G06F 3/0631 by allocating resources to storage systems
• CPC Class Codes: G06F 3/0656 Data buffering arrangements
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A memory system (e.g. a solid state drive) includes one or more non-volatile memory die, a controller in communication with the memory die, a local memory connected to (or part of) the controller and a compute engine inside the memory system that is near the location of the data and can be used to perform common data manipulation operations. When the memory system receives instructions to use the compute engine to perform data manipulation operations, the local memory is reallocated such that an amount of space allocated in the local memory for logical to physical translation information is changed based on the one or more data manipulation instructions.

Claims

1. A non-volatile storage system, comprising:

a controller comprising a processor;

local memory connected to the controller, the local memory is configured to store logical to physical translation information, the controller is configured to perform logical to physical translation of a logical address based on the logical to physical translation information stored in the local memory;

non-volatile memory connected to the controller; and

a compute engine connected to the controller and the local memory, the compute engine is separate from the processor, the compute engine is configured to;

receive one or more data manipulation instructions from an entity external to the non-volatile storage system, and

perform one or more data manipulation operations, using a working area in the local memory for the one or more data manipulation instructions, on data from the non-volatile memory in response to the one or more data manipulation instructions;

wherein the controller is further configured to reallocate space in the local memory in response to the received one or more data manipulation instructions by reducing space in the local memory allocated to logical to physical translation information including removing logical to physical translation information for logical addresses not accessed by the one or more data manipulation instructions and adding space in the local memory allocated for the working area for the one or more data manipulation instructions.

2. The non-volatile storage system of claim 1, wherein:

the controller is further configured to reallocate space in the local memory by receiving an indication of logical addresses with the one or more data manipulation instructions and removing logical to physical translation information from the local memory for logical addresses not included in the indication.

3. The non-volatile storage system of claim 1, wherein:

the controller is further configured to reallocate space in the local memory by inferring logical addresses accessed by the one or more data manipulation instructions and removing logical to physical translation information from the local memory for logical addresses not accessed by the one or more data manipulation instructions.

4. The non-volatile storage system of claim 1, wherein:

the controller is further configured to determine logical addresses accessed by the one or more data manipulation instructions and store logical to physical translation information in the local memory for a subset of logical addresses accessed by the one or more data manipulation instructions and, during performance of the one or more data manipulation operations, derive physical addresses for logical addresses used by the instructions that are not in the subset based on physical addresses for logical addresses used by the instructions that are in the subset.

5. The non-volatile storage system of claim 1, wherein:

the controller is further configured to;

receive the one or more data manipulation instructions from the entity external to the non-volatile storage system and provide the one or more data manipulation instructions to the compute engine;

receive, from the entity external to the non-volatile storage system, logical to physical translation information for logical addresses used by the one or more data manipulation instructions;

change the amount of space allocated in the local memory for logical to physical translation information by adding the received logical to physical translation information for logical addresses used by the one or more data manipulation instructions to the local memory; and

after the compute engine performs the data manipulation operations, update the logical to physical translation information in the local memory based on the data manipulation operations and report updates to the logical to physical translation information to the entity external to the non-volatile storage system.

6. The non-volatile storage system of claim 1, wherein:

the controller is further configured to receive the one or more data manipulation instructions from the entity external to the non-volatile storage system and provide the one or more data manipulation instructions to the compute engine; and

the controller is further configured to convey to the entity external to the non-volatile storage system at least one of a completion status of the one or more data manipulation operations and the result of the one or more data manipulation operations.

7. The non-volatile storage system of claim 1, wherein:

the local memory is further configured to store a result of the one or more data manipulation operations.

8. The non-volatile storage system of claim 1, further comprising:

a memory package separate from and connected to the controller, the memory package includes;

one or more non-volatile memory dies that comprise the non-volatile memory, the compute engine and an error correction engine;

wherein the controller comprises a front end processor circuit and a back end processor circuit connected to the front end processor circuit, the memory package is connected to the back end processor circuit, the front end processor circuit is configured to implement a flash translation layer that performs the logical to physical translation, the back end processor circuit is configured to manage memory operations in the memory package at the request of the front end processor circuit.

9. The non-volatile storage system of claim 8, wherein:

the controller further includes an additional compute engine; and

the additional compute engine is connected to the local memory.

10. The non-volatile storage system of claim 1, wherein:

the non-volatile memory comprises a three dimensional memory structure in which multiple memory levels are formed above a single substrate, the compute engine is positioned on the substrate and below the three dimensional memory structure; and

the three dimensional memory structure, the substrate and the computer engine comprise a single memory die.

11. The non-volatile storage system of claim 1, wherein:

the controller includes an interface to a host, the compute engine is positioned on a non-volatile memory side of the interface to the host.

18. The non-volatile storage system of claim 1, wherein:

the controller is further configured to identify logical addresses in the logical to physical translation information stored in the local memory that is not used by the one or more data manipulation instructions; and

the controller is further configured to reduce space in the local memory by removing logical to physical translation information from the local memory for the logical addresses not used by the one or more data manipulation instructions.

19. The non-volatile storage system of claim 1, wherein:

the compute engine is further configured to perform the one or more data manipulation operations by searching through a set of data read from the non-volatile memory and stored in the working region in order to find a subset of the set of data that meets criteria identified in the one or more data manipulation operations.

12. A method of operating a storage system comprising persistent storage, a controller, a local compute core and a local memory for the controller, the persistent storage storing logical address to physical address translation tables, the local memory storing a cache for the logical address to physical address translation tables in the persistent storage, the method comprising:

receiving at the controller, from a host system, data manipulation instructions including instructions for performing one or more data manipulation operations on data stored in the persistent storage, the data manipulation instructions refer to logical addresses;

in response to receiving the data manipulation instructions from the host system, reallocating space in the local memory by reducing space in the local memory allocated to the cache for the logical address to physical address translation tables in the persistent storage including removing address translation information for logical addresses not accessed by the data manipulation instructions and adding space in the local memory allocated for a working area in the local memory for the one or more data manipulation operations;

in response to receiving the data manipulation instructions from the host system, performing the one or more data manipulation operations on the data using the local compute core and the working area in the local memory to determine a result of the one or more data manipulation operations; and

conveying to the host system at least one of a completion status of the one or more data manipulation operations and the result of the one or more data manipulation operations.

13. The method of claim 12, further comprising:

storing a result of the one or more data manipulation operations in the local memory, the performing the one or more data manipulation operations uses address translation information stored in the local memory; and

in response to performing the one or more data manipulation operations, updating the address translation information stored in the local memory.

14. The method of claim 12, wherein:

the reducing space in the local memory allocated to the cache for the logical address to physical address translation tables in the persistent storage comprises removing address translation information for all logical addresses not accessed by the data manipulation instructions.

15. A non-volatile storage system, comprising:

a non-volatile memory package comprising non-volatile memory and a compute core, the non-volatile memory configured to store a plurality of L2P tables representing address translation information for translating between logical addresses and physical addresses;

a local memory that is separate from the non-volatile memory, the local memory is configured to store a L2P cache for the plurality of L2P tables stored in the non-volatile memory; and

means, in communication with the local memory and the non-volatile memory package, for;

receiving instructions to perform data manipulation operations causing the compute core to perform the data manipulation operations on data read from the non-volatile memory and stored in a working area of the local memory for the data manipulation operations,

in response to the received instructions, reallocating space in the local memory by reducing space allocated to the L2P cache including removing address translation information for logical addresses not accessed by the received instructions and adding space for the working area of the local memory for the data manipulation operations.

16. The non-volatile storage system of claim 15, wherein:

the means for reallocating space is configured to access an identification of logical addresses used by the instructions, store logical to physical translation data for logical addresses used by the instructions and remove logical to physical translation data for logical addresses not used by the instructions.

17. The non-volatile storage system of claim 15, wherein:

the means for receiving instructions is configured to receive, from a host system, code and logical to physical translation data for logical addresses used by the code;

the means for reallocating space is configured to add the logical to physical translation data received from the host system to the L2P cache; and

after the compute core performs the data manipulation operations, the means for reallocating space is further configured to update the L2P cache and report an update to the logical to physical translation data to the host system.