Map tables for hardware tables

• US 10,459,729 B2
• Filed: 04/28/2015
• Issued: 10/29/2019
• Est. Priority Date: 04/28/2015
• Status: Active Grant

• Current Assignee: Hewlett Packard Enterprise Development LP (Hewlett-Packard Enterprise Company)
• Original Assignee: Hewlett Packard Enterprise Development LP (Hewlett-Packard Enterprise Company)
• Inventors: Viquez Calderon, Claudio Enrique
• Primary Examiner(s): Jung, Min
• Application Number:
  US15/507,307
• Publication Number:
  US 20170308828A1
• Time in Patent Office: 1,645 Days
• CPC Class Codes: G06F 9/38 Concurrent instruction execution, e.g. pipeline or look ahead
• CPC Class Codes: G06Q 10/0633 Workflow analysis
• CPC Class Codes: G06Q 10/103 Workflow collaboration or project management
• CPC Class Codes: G06Q 10/20 Administration of product repair or maintenance

Abstract

In one implementation, a system for maintaining a flow pipeline includes a logical table interface engine to expose an interface to receive a maintenance request regarding a flow pipeline of a network element, a map engine to maintain an entry in a first hardware table based on an action of the maintenance request associated with a logical flow table, and a hardware table engine to maintain the second hardware table of the network element based on the entry in the first hardware table.

Claims

1. A system comprising:

a logical table interface engine to receive a maintenance request regarding a flow pipeline of a network element;

a map engine to maintain an entry of a first hardware table based on an action of the maintenance request associated with a logical flow table, the first hardware table designated for a map table, wherein the entry is to comprise;

a table reference to a second hardware table; and

table information related to the logical flow table, the table information comprising a table class and a table size; and

a hardware table engine to maintain the second hardware table of the network element based on the entry in the first hardware table, the second hardware table having a set of attributes including the table information.

2. The system of claim 1, wherein the hardware table engine is further to:

identify a memory resource class based on a table class parameter of the maintenance request; and

allocate a section of a memory resource of the network element for the second hardware table of the table class parameter based on the memory resource class and an entry size parameter of the maintenance request.

3. The system of claim 2, wherein the maintenance request is a table modify request and the hardware table engine is further to:

change a size of the section of the memory resource in accordance with a change of the table information in the entry.

4. The system of claim 1, wherein:

the table information further comprises a logical table number and a search parameter; and

the table class is one of a general purpose table, a hash table, and a ternary content addressable memory (“

TCAM”

) table.

5. The system of claim 1, wherein the entry further comprises a plurality of parsers and the map engine is further to:

build a key associated with the second hardware table based on the plurality of parsers; and

place the key in a key field of the entry in the first hardware table.

6. The system of claim 1, wherein the map engine is further to:

maintain a table order of the flow pipeline by arranging entries of the first hardware table.

7. The system of claim 6, wherein the entry further includes a table counter and the map engine is to:

rearrange the entries of the first hardware table based on the table counter.

8. A non-transitory computer-readable storage medium comprising a set of instructions executable by a processor resource to:

identify attributes of a logical flow table from a first request to create a hardware table corresponding to the logical flow table;

add an entry into a hardware map table of a network element, the entry to include table information associated with the attributes of the logical flow table;

allocate a hardware table resource of the network element based on the attributes of the logical flow table; and

supply a reference pointer from the entry of the hardware map table upon a second request for access to the logical flow table, a destination of the reference pointer being the hardware table resource.

9. The medium of claim 8, wherein the set of instructions is executable by the processor resource to:

identify a location in an order of entries in the hardware map table to place the entry based on a desired order of execution of a plurality of hardware tables of the network element indicated by the first request; and

execute a flow pipeline based on the order of entries in the hardware map table.

10. The medium of claim 8, wherein the set of instructions to allocate the hardware table resource is executable by the processor resource to:

designate a section of the hardware table resource for the hardware table associated with the logical flow table, the hardware table resource being a memory resource;

dynamically identify the section of the hardware table resource between a first memory address and a second memory address based on a size of the logical flow table associated with the hardware table; and

update a table entry size field of the entry based on the size of the logical flow table.

11. A method for accomplishing a flow pipeline comprising:

locating a map table of a network element in response to a flow pipeline execution request;

identifying a hardware table of the network element based on a map table entry correlated with a logical flow table;

fetching a reference pointer to the hardware table from the map table entry;

performing a lookup on the hardware table at a destination of the reference pointer; and

performing an action when the lookup identifies a match in the hardware table.

12. The method of claim 11, comprising:

identifying an attribute of the hardware table based on a parameter of a maintenance request; and

identifying an amount of resources available from the network element.

13. The method of claim 11, comprising:

changing a size of the hardware table in response to a change in the map table entry in accordance with a change in a size of the logical flow table associated with the hardware table.

14. The method of claim 11, comprising:

changing an order of the flow pipeline by rearranging entries of the map table.

15. The method of claim 11, comprising:

removing the logical flow table that corresponds to the hardware table from the flow pipeline by deleting the map table entry in the map table that corresponds to the hardware table; and

allocating hardware table resources of the network element designated to the removed hardware table to an added hardware table.